73S1210F Maxim, 73S1210F Datasheet - Page 19

• Manufacturer Part Number: 73S1210F
• Description: The 73S1210F is a versatile and economical CMOS system-on-chip (SoC) device intended for smart card reader applications
• Manufacturer: Maxim

DS_1210F_001
1.5.2
Table 7 shows the location of the SFRs and the value they assume at reset or power-up.
Rev. 1.4
Name
SP
DPL
DPH
DPL1
DPH1
WDTREL
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
MCLKCtl
USR70
UDIR70
DPS
ERASE
S0CON
S0BUF
IEN2
S1CON
S1BUF
S1RELL
IEN0
IP0
S0RELL
FLSHCTL
PGADDR
IEN1
IP1
S0RELH
S1RELH
IRCON
T2CON
PSW
KCOL
IRAM Special Function Registers (Generic 80515 SFRs)
Location Reset Value
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8F
0x90
0x91
0x92
0x94
0x98
0x99
0x9A
0x9B
0x9C
0x9D
0xA8
0xA9
0xAA
0xB2
0xB7
0xB8
0xB9
0xBA
0xBB
0xC0
0xC8
0xD0
0XD1
Table 7: IRAM Special Function Registers Reset Values
0x07
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0A
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xD9
0x00
0x00
0x00
0x00
0x03
0x03
0x00
0x00
0x00
0x1F
Description
Stack Pointer
Data Pointer Low 0
Data Pointer High 0
Data Pointer Low 1
Data Pointer High 1
Watchdog Timer Reload register
Power Control
Timer/Counter Control
Timer Mode Control
Timer 0, low byte
Timer 1, high byte
Timer 0, low byte
Timer 1, high byte
Master Clock Control
User Port Data (7:0)
User Port Direction (7:0)
Data Pointer Select Register
Flash Erase
Serial Port 0, Control Register
Serial Port 0, Data Buffer
Interrupt Enable Register 2
Serial Port 1, Control Register
Serial Port 1, Data Buffer
Serial Port 1, Reload Register, low byte
Interrupt Enable Register 0
Interrupt Priority Register 0
Serial Port 0, Reload Register, low byte
Flash Control
Flash Page Address
Interrupt Enable Register 1
Interrupt Priority Register 1
Serial Port 0, Reload Register, high byte
Serial Port 1, Reload Register, high byte
Interrupt Request Control Register
Timer 2 Control
Program Status Word
Keypad Column
73S1210F Data Sheet
19