73S1210F Maxim, 73S1210F Datasheet - Page 55
73S1210F
Manufacturer Part Number
73S1210F
Description
The 73S1210F is a versatile and economical CMOS system-on-chip (SoC) device intended for smart card reader applications
Manufacturer
Maxim
Datasheet
1.73S1210F.pdf
(126 pages)
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DS_1210F_001
1.7.12.2
To read data on the I
in this sequence:
1. Write slave device address to Device Address register (DAR). The data contains 7 bits device
2. Write control data to Control and Status register. Write a 1 to bit 1 to start I
3. Wait for I
4. Read data from the Read Data register (RDR).
5. Read data from Secondary Read Data register (SRDR) if bit 0 of Control and Status register (CSR) is
Rev. 1.4
address and 1 bit of op-code. The op-code bit should be written with a 1.
a 1 to bit 0 if the Secondary Read Data register (SRDR) is to be captured from the I
Refer to information about the INT6Ctl,
written with a 1.
Transfer length
Transfer length
I2C_Interrupt
I2C_Interrupt
(CSR bit1)
(CSR bit0)
(CSR bit1)
Start I2C
(CSR bit0)
Start I2C
SDA
SCL
SDA
SCL
I
2
C Read Sequence
2
C interrupt to be asserted. It indicates that the read operation on the I
condition
condition
START
2
START
C Master Bus from a slave device, the 80515 has to program the following registers
MSB
MSB
Device Address
Device Address
1-7
1-7
Figure 10: I
[7:0]
[7:0]
LSB
LSB
8
8
IEN1
2
ACK bit
C Write Mode Operation
ACK bit
9
9
and
MSB
MSB
Write Data [7:0
Write Data [7:0]
IRCON
10-17
10-17
LSB
LSB
registers for masking and flag operation.
ACK bit
ACK bit
18
18
MSB
Secondary Write
condition
STOP
Data [7:0]
19-26
2
LSB
C Master Bus. Also write
ACK bit
73S1210F Data Sheet
2
C bus is done.
27
2
C Slave device.
condition
STOP
55
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