MAX7304 Maxim, MAX7304 Datasheet - Page 14

• Manufacturer Part Number: MAX7304
• Description: The MAX7304 consists of 16 port GPIOs, with 12 push-pull GPIOs and four open-drain GPIOs configurable as PWM-controlled LED drivers
• Manufacturer: Maxim

The device has two 7-bit long slave addresses. The bit
following a 7-bit slave address is the R/W bit, which is
low for a write command and high for a read command.
The first 4 bits (MSBs) of the device slave addresses
are always 0111. Slave address bits A[3:1] correspond,
by the matrix in
address input pin AD0, and A0 corresponds to the R/W
bit
four signals: GND, V
sible slave-address pairs, allowing up to four devices to
share the same bus. Because SDA and SCL are dynamic
signals, care must be taken to ensure that AD0 transitions
no sooner than the signals on SDA and SCL.
The device monitors the bus continuously, waiting for a
START condition followed by its slave address. When the
device recognizes its slave address, it acknowledges
and is then ready for continued communication.
Table 2. 2-Wire Interface Address Map
Figure 5. Slave Address
Figure 6. Command Byte Received
GND
V
SDA
SCL
PIN AD0
CC
(Figure
SDA
SCL
5). The AD0 input can be connected to any of
S
A7
0
with High Level of Integrated ESD Protection
 Maxim Integrated Products 14
A6
Table
MSB
1
0
CC
A5
, SDA, or SCL, giving four pos-
1
2, to the states of the device
DEVICE ADDRESS
COMMAND BYTE IS STORED ON RECEIPT OF
Level-Translating GPIO and LED Driver
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX7304
A4
1
1
A3
Slave Addresses
0
0
1
1
ACKNOWLEDGE CONDITION
A2
R/W
0
1
0
1
1
A1
0
1
0
R/W
A0
A
A3
D7
The device features a 20ms (min) bus timeout on the
2-wire serial interface, largely to prevent the device from
holding the SDA I/O low during a read transaction, should
the SCL lock up for any reason before a serial transac-
tion is completed. Bus timeout operates by causing the
device to internally terminate a serial transaction, either
read or write, if the time between adjacent edges on SCL
exceeds 20ms. After a bus timeout, the device waits for a
valid START condition before responding to a consecu-
tive transmission. This feature can be enabled or disabled
under user control by writing to the configuration register.
A write to the device comprises the transmission of the
slave address with the R/W bit set to zero, followed by at
least one byte of information. The first byte of information
is the command byte. The command byte determines
which register of the device is to be written by the next
byte, if received. If a STOP condition is detected after the
command byte is received, the device takes no further
action
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the device selected by the command byte
If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent device internal registers, because the
command byte address generally autoincrements.
I
D6
2
(Figure
C-Interfaced 16-Port,
A2
D5
COMMAND BYTE
ACKNOWLEDGE FROM MAX7304
D4
6) beyond storing the command byte.
LSB
A1
D3
Message Format for Writing
D2
R/W
D1
D0
MAX7304
ACK
A
Bus Timeout
P
(Figure
7).