MAX7319 Maxim, MAX7319 Datasheet - Page 6

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MAX7319

Manufacturer Part Number
MAX7319
Description
The MAX7319 2-wire serial-interfaced peripheral features eight input ports with selectable internal pullups, overvoltage protection to +6V, and transition detection with interrupt output
Manufacturer
Maxim
Datasheet

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changes. An input change sets one of eight flag bits
that identify changed input(s). All flags are cleared
upon a subsequent read or write transaction to the
MAX7319.
A latching interrupt output, INT, is programmed to flag
input data changes on input ports through an interrupt
mask register. By default, data changes on any input
port force INT to a logic-low. The interrupt output, INT,
and all transition flags are cleared when the MAX7319
is next accessed through the serial interface.
Internal pullup resistors to V+ are selected by the
address-select inputs, AD0 and AD2. Pullups are
enabled on the input ports in groups of four (see Table 3).
On power-up, the transition detection logic is reset, and
INT is released to a high-impedance state. The inter-
rupt mask register is set to 0xFF, enabling the interrupt
output for transitions on all eight input ports. The transi-
tion flags are cleared to indicate no data changes.
The RST input voids any I
MAX7319, forcing the MAX7319 into the I
dition. A reset does not affect the interrupt output (INT)
or change the contents of the interrupt mask register.
RST is overvoltage tolerant to +6V.
I
Maskable Transition Detection
Table 1. MAX7319–MAX7329 Family Comparison (continued)
6
16-PORT EXPANDERS
MAX7323
MAX7328
MAX7329
MAX7324
MAX7325
MAX7326
MAX7327
2
PART
_______________________________________________________________________________________
C Port Expander with Eight Inputs and
ADDRESS
110xxxx
0100xxx
0111xxx
101xxxx
110xxxx
SLAVE
and
I
2
C
INPUTS
Up to 4
Up to 8
Up to 8
Up to 4
8
4
2
C transaction involving the
INTERRUPT
Initial Power-Up
INPUT
MASK
Yes
Yes
2
C STOP con-
RST Input
OUTPUTS
Up to 4
Up to 8
Up to 8
Up to 4
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
When the serial interface is idle, the MAX7319 automat-
ically enters standby mode, drawing minimal supply
current.
Address inputs AD0 and AD2 determine the MAX7319
slave address and select which inputs have pullup
resistors. Pullups are enabled on the input ports in
groups of four (see Table 3). The MAX7319, MAX7321,
MAX7322, and MAX7323 use a different range of slave
addresses (110xxxx) than the MAX7320 (101xxxx).
The MAX7319 slave address is determined on each I
transmission, regardless of whether the transmission is
actually addressing the MAX7319. The MAX7319 distin-
guishes whether address inputs AD2 and AD0 are con-
nected to SDA or SCL instead of fixed logic levels V+
or GND during this transmission. This means that the
MAX7319 slave address can be configured dynamically
in the application without cycling the device supply.
On initial power-up, the MAX7319 cannot decode the
address inputs AD2 and AD0 fully until the first I
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
address selection determines which inputs have
pullups applied. However, at power-up, the I
and SCL bus interface lines are high impedance at the
pins of every device (master or slave) connected to the
bus, including the MAX7319. This is guaranteed as part
12
12
4
8
8
Slave Address and Input Pullup Selection
Four I/O, four output-only versions:
Four open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
Four push-pull outputs with selectable power-up
default levels.
PCF8574-, PCF8574A-compatible versions:
Eight open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
All ports power up as inputs (or logic-high outputs).
Any port can be used as an input by setting the
open-drain output to logic-high.
Software equivalent to a MAX7320 plus a MAX7321.
Software equivalent to a MAX7320 plus a MAX7319.
Software equivalent to a MAX7320 plus a MAX7322.
Software equivalent to a MAX7320 plus a MAX7323.
APPLICATION
Standby Mode
2
C SDA
2
2
C
C

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