TDA9981BHL/8/C1;55 NXP Semiconductors, TDA9981BHL/8/C1;55 Datasheet - Page 20
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TDA9981BHL/8/C1;55
Manufacturer Part Number
TDA9981BHL/8/C1;55
Description
IC HDMI TX 81MHZ 80-LQFP
Manufacturer
NXP Semiconductors
Type
Transmitterr
Datasheet
1.TDA9981BHL15C15.pdf
(41 pages)
Specifications of TDA9981BHL/8/C1;55
Applications
Recorders, Set-Top Boxes
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935285247557
NXP Semiconductors
TDA9981B_1
Product data sheet
Fig 11. NXP I
AP0/WS
x = 1, 2, 3, 4
AP0/WS
x = 1, 2, 3, 4
ACLK
ACLK
APx
APx
a. 32-bit mode
b. 16-bit mode
left channel
left channel
B0
0
R
R
2
8.11 Power management
8.12 Interrupt controller
8.13 Initialization
S-bus formats
B23
B15
L
L
B14
serial clock. Various I
appropriate bits of the register. The I
audio samples via the serial data input with a clock frequency of at least 32 times the input
sample frequency f
precision can be received automatically. Audio samples with a precision better than 24
bits are truncated to 24 bits. If the input clock has a frequency of 32
samples can be received. In this case, the 8 LSBs will be set to logic 0. The serial data
signal carries the serial baseband audio data, sample by sample left/right interleaved. The
word select signal WS indicates whether left or right channel information is transferred
over the serial data line. The formats for 16-bit and 32-bit modes are shown in
The TDA9981B can be powered down via the I
Pin INT is used to alert the microcontroller that a critical event concerning the HDMI has
occurred (hot plug detect, RxSense). These interrupts are maskable.
Hot plug or unplug detect: pin HPD is the hot plug detection pin; it is 5 V input tolerant.
Hard reset: after power-up, the TDA9981B is activated by a hard reset via pin RST_N.
However, the TDA9981B has a power-on reset.
L
B13
B0
L
L
s
. Since the I
2
S-bus formats are supported and can be selected by setting the
B2
0
L
L
Rev. 01 — 4 July 2008
B1
0
L
L
2
S-bus format is MSB aligned, audio data with an arbitrary
right channel
right channel
B0
0
L
L
2
S-bus input interface can receive up to 24-bit wide
B23
B15
R
R
B14
R
2
C-bus register.
B13
B0
150 MHz pixel rate HDMI transmitter
R
R
B2
0
TDA9981B
R
R
f
s
© NXP B.V. 2008. All rights reserved.
, only 16-bit audio
B1
0
R
R
B0
0
R
Figure
R
001aag915
001aag916
B23
B15
20 of 41
L
L
11.