EL4511CUZ-T7 Intersil, EL4511CUZ-T7 Datasheet - Page 22

• Manufacturer Part Number: EL4511CUZ-T7
• Description: IC VID SYNC SEPARATR HDTV 24QSOP
• Manufacturer: Intersil
• Type: Synchronous Separatorr

Specifications of EL4511CUZ-T7

• Applications: HDTV, Projectors, Set-Top Boxes
• Mounting Type: Surface Mount
• Package / Case: 24-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER
NUMBER
13
14
1
2
3
4
6
7
8
9
REGISTER
BIT
5:3
6:0
7:4
7:6
7:0
7:4
7:0
7
6
5
4
1
7
3
2
1
0
3
2
1
0
6
5
4
3
2
1
0
General Control Reg 1
General Reset
AlwaysEnOutputs
ModeCtrl
General Control Reg 2
Select Fixed Slicing (no S/H)
FILTER_ENABLED
OE_MODE
V
EnVBlank
VSTPlusBP
V
VFrontPorch
DefaultHPolarity
DefaultVPolarity
EnHPolarityDet
EnVPolarityDet
Oscillator Control 2
CMuxCtrl <1:0>
V
LinesPerFrame <7:0>
V
LinesPerFrame <11:8>
En50Slice
LPFValid
progressive
tri-level detect
Analog Control Reg 1
ENXTAL
ENLEVELBLANKING
ENLEVEL
ENSYCLAMP
ENALOS
ENRVIDEO
PWRSAVE
Absolute Timing Ref 1
CountsPerField <7:0>
Absolute Timing Ref 2 & Misc
BLANK
BLANK
BLANK
BLANK
22
Control Reg 1
& Polarity Ctrl
O/P Reg 1
O/P Reg 2 & Misc
SIGNAL NAME
TABLE 5. SERIAL INTERFACE REGISTER BIT ALLOCATIONS
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
EL4511
R
R
R
R
RESET
VALUE
00h
10h
90h
10h
4Fh
22h
80h
4h
0
0
0
0
1
0
1
1
1
1
1
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
Software reset. Does not affect serial interface.
Overrides internal qualification of outputs.
Sync acquisition. Selects input signal. See Table 3.
Necessary for SECAM. May be useful for VCRs.
Set Hi to include digital filter on horizontal input.
Set Hi for Odd/Even changes on rising edge of vertical.
Enables vertical blank interval detection algorithm.
Number of lines after vertical sync time.
Number of lines before vertical sync time.
HIN polarity on reset if EnHpolarityDet = Lo.
VERTIN polarity on reset and if EnVpolarityDet = Lo.
Allows EL4511 to detect and set polarity on HIN.
Allows EL4511 to detect and set polarity on VERTIN.
Multiplexes clock onto V
Only valid if V
Least significant byte of lines per frame count.
Most significant 4 bits of lines per frame count.
Indicates sample and hold front end is being used.
Indicates lines per frame has been updated.
Not valid for certain types of composite sync.
Only valid if tri-level sync detected.
Set Hi to enable crystal oscillator.
Set Hi to enable V
Set Hi to disable V
Set Hi to disable “soft” sync tip clamping in SYNCIN.
Set Hi to disable analog loss of signal feature.
Set Hi to disable internal biasing on SYNCIN (passive resistor
or soft clamp.)
Set Hi to put the analog circuit into powersave mode.
Crystal clock periods per field: L.S. Byte. (see description)
DESCRIPTION AND COMMENTS
BLANK
LEVEL
LEVEL
circuit is enabled
BLANK
when not locked.
output.
or Odd/Even. See Table 1.
November 12, 2010
FN7009.8