ISL59920IRZ-T7 Intersil, ISL59920IRZ-T7 Datasheet - Page 3

• Manufacturer Part Number: ISL59920IRZ-T7
• Description: IC ANLG VID LINE TRPL 20-QFN
• Manufacturer: Intersil
• Type: Video Delay Liner

Specifications of ISL59920IRZ-T7

• Applications: RGB Video Signals
• Mounting Type: Surface Mount
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Specifications
t
V
Settling Time
THD
X
V
G_0
G_m
G_f
DG_m0
DG_f0
DG_fm
V
I
V
Z
+PSRR
-PSRR
I
V
V
PARAMETER
R
B
OUT
OUT
OVER
N
IN
OS
IH
IL
- t
F
Transient Response Time
Voltage Overshoot
Output Settling after Delay Change / Offset
Calibration
Total Harmonic Distortion
Crosstalk
Output Noise
Gain Zero Delay
Gain Mid Delay
Gain Full Delay
Difference in Gain, 0 to Mid
Difference in Gain, 0 to Full
Difference in Gain, Mid to Full
Input Voltage Range
R
Output Offset Voltage
Output Impedance
Rejection of Positive Supply
Rejection of Negative Supply
Output Drive Current
Logic High
Logic Low
IN
, G
IN
, B
IN
Input Bias Current
3
DESCRIPTION
V
R
SP
LOAD
= V
ISL59920, ISL59921, ISL59922, ISL59923
= 150Ω on all video outputs, unless otherwise specified. (Continued)
SPO
= +5V, V
SM
= V
SMP
= -5V, GAIN = 2, T
ISL59920, 20% to 80%, for any delay, 1V step
delay = 0ns
ISL59921, 20% to 80%, for any delay, 1V step
delay = 0ns
ISL59922, 20% to 80%, for any delay, 1V step
delay = 0ns
ISL59923, 20% to 80%, for any delay, 1V step
delay = 0ns
For any delay, response to 1V step input
Output settling time from rising edge of
SENABLE
1V
mid delay setting
Stimulate G, measure R/B at 1MHz,
ISL59920, ISL59921, ISL59923
ISL59922
Bandwidth = 150MHz
ISL59920, Gain remains > 90% of nominal,
Gain = 2
ISL59921, Gain remains > 90% of nominal,
Gain = 2
ISL59922, Gain remains > 90% of nominal,
Gain = 2
ISL59923, Gain remains > 90% of nominal,
Gain = 2
ISL59920, ISL59921
ISL59922, ISL59923
Post offset calibration (Note 4), Delay = 0ns
and Delay = Full
ISL59920, ISL59921, Enabled,
Chip enable = 5V
ISL59922, ISL59923, Enabled,
Chip enable = 5V
Disabled, Chip enable = 0V
10Ω load, 0.5V drive
Switch high threshold
Switch low threshold
P-P
10MHz sinewave, offset by +0.2V at
CONDITION
A
= +25°C, exposed die plate = -5V, x2 = 5V,
1.74
1.67
MIN
-0.7
-0.7
-0.7
-0.7
1.6
-12
-10
1.5
-25
4.5
3.5
0.8
43
-8
3
TYP MAX
1.43
-1.8
-1.7
1.7
1.6
1.7
-43
-80
-78
1.8
1.8
1.8
0.6
5.4
-42
-58
53
-4
4
3
2
6
8
1.92
1.97
1.04
1.04
1.15
+20
-38
-63
-59
-29
-46
7.5
7.5
1.1
6.3
6.3
1.6
10
70
2
8
8
August 31, 2010
mV
FN6826.2
UNIT
V/V
V/V
V/V
MΩ
mV
mA
dB
dB
dB
µA
µA
dB
dB
ns
ns
ns
ns
µs
%
%
%
%
Ω
Ω
V
V
V
V
V
V
RMS