TDA9983BHW/15/C1;5 NXP Semiconductors, TDA9983BHW/15/C1;5 Datasheet - Page 58
TDA9983BHW/15/C1;5
Manufacturer Part Number
TDA9983BHW/15/C1;5
Description
IC HDMI TX 150MHZ 80-HTQFP
Manufacturer
NXP Semiconductors
Type
Transmitterr
Specifications of TDA9983BHW/15/C1;5
Applications
Recorders, Set-Top Boxes
Mounting Type
Surface Mount
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935285482551
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TDA9983B_1
Product data sheet
Table 68.
Legend: * = default value
Table 69.
Legend: * = default value
Bit
7 to 4
3 to 2
1 to 0
Bit
7 to 5
4
3 to 2
1
0
Symbol
SRL_PR[3:0]
x
SRL_NOSC[1:0]
Symbol
x
SRL_PXIN_SEL
x
SRL_DE
SRL_CCIR
PLL_SERIAL_2 register (address 01h) bit description
PLL_SERIAL_3 register (address 02h) bit description
Rev. 01 — 20 May 2008
Access Value
R/W
R/W
R/W
Access Value
R/W
R/W
R/W
R/W
R/W
0000*
0001
0010
0011
0100
0101
0110
0111
1000
1001
other
00*
00*
01
10
11
000*
0*
1
00*
0*
1
0*
1
Description
serializer pixel repetition: pixel repetition
factor (ip_auto)
undefined
serializer N oscillator: predivider division
factor
Description
undefined
serializer pixel input select
undefined
serializer double edge: double edge divider
in feedback loop
serializer CCIR
pr = 1 (ip_auto = 400 nA)
pr = 2 (ip_auto = 200 nA)
pr = 3 (ip_auto = 133 nA)
pr = 4 (ip_auto = 100 nA)
pr = 5 (ip_auto = 80 nA)
pr = 6 (ip_auto = 66 nA)
pr = 7 (ip_auto = 57 nA)
pr = 8 (ip_auto = 50 nA)
pr = 9 (ip_auto = 50 nA)
pr = 10 (ip_auto = 50 nA)
undefined
div_by_1; PLL output frequency range =
(800 to 1500) Msample/s (Iz = 1.0+)
div_by_2; PLL output frequency range =
(400 to 800) Msample/s (Iz = 1.5+)
div_by_4; PLL output frequency range =
(200 to 400) Msample/s (Iz = 2.0+)
div_by_4; PLL output frequency range =
(200 to 400) Msample/s (Iz = 2.0+)
PXINclko = SCAclko
PXINclko = SCAclko / 2
no division
divide by 2
pllsrl_in = pllsrl_refin
pllsrl_in = pllsrl_refin / 2
150 MHz pixel rate HDMI transmitter
TDA9983B
© NXP B.V. 2008. All rights reserved.
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