TDA9983BHW/8/C1,55 NXP Semiconductors, TDA9983BHW/8/C1,55 Datasheet - Page 60

• Manufacturer Part Number: TDA9983BHW/8/C1,55
• Description: IC HDMI TX 81MHZ 80-HTQFP
• Manufacturer: NXP Semiconductors
• Type: Transmitterr

Specifications of TDA9983BHW/8/C1,55

• Applications: Recorders, Set-Top Boxes
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935283445557

NXP Semiconductors
Table 74.
Legend: * = default value
Table 75.
Legend: * = default value
TDA9983B_1
Product data sheet
Address Register
08h
07h
Address Register
0Ah
09h
PLL_SCGN2
PLL_SCGN1
PLL_SCGR2
PLL_SCGR1
PLL_SCGNx registers (address 07h to 08h) bit description
PLL_SCGRx registers (address 09h to 0Ah) bit description
Table 73.
Legend: * = default value
Table 76.
Legend: * = default value
Bit
1 to 0
Bit
7
6
5 to 4
3
Bit
7 to 3 x
2 to 0 SCG_NDIV[10:8]
7 to 0 SCG_NDIV[7:0]
Bit
7 to 1 x
0
7 to 0 SCG_RDIV[7:0]
Symbol
SCG_NOSC[1:0]
Symbol
BYPASS_PLLDE
x
PLLDE_NOSC[1:0]
x
PLL_SCG2 register (address 06h) bit description
PLL_DE register (address 0Bh) bit description
Symbol
Symbol
SCG_RDIV[8]
Rev. 01 — 20 May 2008
Access Value
R/W
R/W
R/W
R/W
Access Value
R/W
Access Value
R/W
R/W
R/W
Access Value
R/W
R/W
R/W
0
1*
0*
00*
01
10
11
0*
00*
01
10
11
0000 0*
000*
FAh*
0000 000* undefined
0*
5Bh*
Description
scg N oscillator
Description
bypass PLL double edge
undefined
PLL double edge N oscillator
undefined
div_by_1; PLL output frequency range =
(80 to 150) Msample/s
div_by_2; PLL output frequency range =
(40 to 80) Msample/s
div_by_4; PLL output frequency range =
(20 to 40) Msample/s
div_by_8; PLL output frequency range =
(10 to 20) Msample/s
pllde0 = de_nosc predivider output
pllde0 = pllde_inref
div_by_1; PLL output frequency range =
(80 to 150) Msample/s
div_by_2; PLL output frequency range =
(40 to 80) Msample/s
div_by_4; PLL output frequency range =
(20 to 40) Msample/s
div_by_8; PLL output frequency range =
(10 to 20) Msample/s
150 MHz pixel rate HDMI transmitter
Description
undefined
scg N divider: PLL feedback oscillator
divider
Description
scg R divider: divider value of the PLL
reference input clock
…continued
TDA9983B
© NXP B.V. 2008. All rights reserved.
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