74ABT541CSC Fairchild Semiconductor, 74ABT541CSC Datasheet
74ABT541CSC
Specifications of 74ABT541CSC
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74ABT541CSC Summary of contents
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... Flow-through pinout for ease of PC board layout ■ Disable time less than enable time to avoid bus contention Ordering Information Package Order Number Number 74ABT541CSC M20B 74ABT541CSJ M20D 74ABT541CMSA MSA20 74ABT541CMTC MTC20 Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering number. ...
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... Symbol T Free Air Ambient Temperature A V Supply Voltage CC ∆ ∆ t Minimum Input Edge Rate Data Input Enable Input ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Outputs Parameter Parameter 2 Rating –65°C to +150°C –55°C to +125°C – ...
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... Outputs Enabled CCT I /Input CC Outputs 3-STATE Outputs 3-STATE I Dynamic I No Load CCD CC Notes: < 0.8mA/MHz. 2. For 8-bit toggling, I CCD 3. Guaranteed, but not tested. ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 V Conditions CC Recognized HIGH Signal Recognized LOW Signal = –18mA Min –3mA Min –32mA I ...
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... Guaranteed, but not tested. ILD IHD AC Electrical Characteristics SOIC and SSOP package. Symbol Parameter t Propagation Delay, PLH Data to Outputs t PHL t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Conditions = 50pF 500Ω 25°C (4) 5 25°C (4) 5 25° ...
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... LOW-to-HIGH, HIGH-to-LOW, etc.) with 250pF load capacitors in place of the 50pF load capacitors in the standard AC load. 10. The 3-STATE delays are dominated by the RC network (500Ω, 250pF) on the output and have been excluded from the datasheet. ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 = –40°C to +85°C, –40°C to +85°C, ...
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... Capacitance Symbol Parameter C Input Capacitance IN (16) C Output Capacitance OUT Note: is measured at frequency MHz, per MIL-STD-883, Method 3012. 16. C OUT ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 = –40°C to +85°C, = –40°C to +85° 4.5V to 5.5V, = 4.5V to 5.5V 50pF, ...
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... Figure 1. Standard AC Test Load Amplitude 3.0V AC Waveforms Figure 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions Figure 5. Propagation Delay, Pulse Width Waveforms ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Figure 2. Test Input Signal Levels Rep. Rate MHz 500 ns 2 ...
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... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Package Number M20B 8 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 9. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Package Number M20D 9 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 10. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Package Number MSA20 10 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 11. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1992 Fairchild Semiconductor Corporation 74ABT541 Rev. 1.4 Package Number MTC20 11 www.fairchildsemi.com ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...