74LVT244APW,118 NXP Semiconductors, 74LVT244APW,118 Datasheet - Page 8

• Manufacturer Part Number: 74LVT244APW,118
• Description: IC BUFF/DVR TRI-ST DUAL 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVTr

Specifications of 74LVT244APW,118

• Package / Case: 20-TSSOP
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 4
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: LVT
• Number Of Channels Per Chip: 8
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 32 mA
• Input Bias Current (max): 12000 uA
• Low Level Output Current: 32 mA
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Output Current: 128 mA
• Output Type: 3-State
• Output Voltage: 7 V
• Propagation Delay Time: 2.6 ns (Typ) @ 3.3 V
• Logical Function: Buffer/Line Driver
• Number Of Elements: 2
• Number Of Channels: 8
• Number Of Inputs: 8
• Number Of Outputs: 8
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Quiescent Current: 12mA
• Technology: BiCMOS
• Pin Count: 20
• Mounting: Surface Mount
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Number Of Lines (input / Output): 8 / 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2316-2; 74LVT244APW-T; 935176380118

NXP Semiconductors
Table 9.
74LVT_LVTH244A_4
Product data sheet
Input
V
2.7 V
Fig 7.
I
Test data is given in
Definitions test circuit:
R
C
R
V
Load circuitry for switching times
EXT
L
L
T
Test data
f
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
i
10 MHz
= Test voltage for switching times.
Table
t
500 ns
W
9.
negative
positive
pulse
pulse
0 V
0 V
V
V
I
I
t
G
r
, t
90 %
10 %
2.5 ns
f
Rev. 04 — 3 September 2008
V
I
t
t
f
r
V
V
M
M
10 %
90 %
R T
Load
C
50 pF
L
V
DUT
DD
74LVT244A; 74LVTH244A
t
t
W
W
V
O
R
500
o
L
of the pulse generator.
C L
V
V
M
M
t
t
001aai546
V
r
f
EXT
3.3 V octal buffer/line driver; 3-state
R L
R L
V
t
GND
PHZ
EXT
, t
PZH
t
6 V
PLZ
, t
PZL
© NXP B.V. 2008. All rights reserved.
t
open
PLH
, t
PHL
8 of 15