TB1328FG Toshiba, TB1328FG Datasheet - Page 20

no-image

TB1328FG

Manufacturer Part Number
TB1328FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TB1328FG

Function
Programmable audio/video switch and frequency detection
Features
CVBS, S-Video or YcbrCr/RGB or D-connector, auto sync processor, pre-filter, dummy HD/VD output
Operating Voltage
9V,5V
Package
QFP64 (lead-free)
Vertical sync separation for 1250i/50
circuit. The phase of the VD-out (pin 9) depends on the H-SYNC timing shown in the figure below. There is no VD-out
when there is no H-SYNC input.
V FREQ DET) to detect the 1250i/50.
NOTE: The VD-OUT’s tailing edge has a jitter. Use the leading edge only.
HD width
1125/50p/60p format owing to crosstalk from HD-OUT to video signals so that spike noises on video signals will occur.
HD/VD input amplitude
acceptable minimum amplitude then becomes 2.0 Vp-p.
When HV FREQ2 = 01000, the vertical sync separation for the 1250i/50 is accomplished through the use of a special
In the manual sync processing mode (A-SYNC = OFF), use READ BUS functions, V-SYNC-W and H, V FORMAT (or H,
HD-OUT width is selectable by HD WIDTH as below. HD WIDTH = 1 (NARROW) is recommended for the
When a 5.6 kΩ is added before the input pin as in the following figure, 5.0 Vp-p pulse input is allowed. However, the
1.0 to 2.0 Vp-p Input
( Second field )
(First field )
VD OUT
VD OUT
INPUT
( Pin 9 )
INPUT
( Pin 9 )
or
Normal application
100Ω
1uF/4.7uF
pin 22,23
V- SYNC
V- SYNC
Leading edge
SYNC-IN
(Y-IN)
HD-OUT
(HD WIDTH=1)
HD-OUT
(HD WIDTH=0)
HD/VD-IN
Leading edge
20
1.7us (typ)
1125/60p signal
0.7us (typ)
2.0 to 5.0 Vp-p Input
or
For large input application
1uF/4.7uF
Trailing edge with a jitter
5.6kΩ
Trailing edge with a jitter
TB1328FG
pin 22,23
2006-11-13
HD/VD-IN

Related parts for TB1328FG