TMPM380FWDFG Toshiba, TMPM380FWDFG Datasheet - Page 181
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TMPM380FWDFG
Manufacturer Part Number
TMPM380FWDFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM380FWDFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
12K
Number Of Pins
100
Package
QFP(14×20)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
2
I2c/sio (ch)
2
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
18
16-bit Timer / Counter
8
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
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TBnST
(0x4001_0xx4)
<INTTB0>:Interrupt generated status for a match with timer register 0 (TBnRG0)
<INTTB1>:Interrupt generated status for a match with timer register 1 (TBnRG1)
<INTTBOF>:Interrupt generated status for an up-counter overflow occurs
(Note) If any interrupt is generated, the flag that corresponds to the interrupt is set to TBnST and
9.4.1.6 TMRB status register (channels 0 through 7)
The flag is cleared by reading the TBnST register.
the generation of interrupt is notified to the CPU.
bit Symbol
Read/Write
After reset
Read/Write
Read/Write
Read/Write
bit Symbol
After reset
bit Symbol
After reset
bit Symbol
After reset
Function
0: No interrupt generated
1: Interrupt generated
0: No interrupt generated
1: Interrupt generated
0: No interrupt generated
1: Interrupt generated
31
23
15
R
R
R
7
0
0
0
30
22
14
R
R
R
6
0
0
0
TMRBn status register (n=0~7)
“0” is read.
TMPM380/M382 - 15 / 34 -
29
21
13
R
R
R
5
R
0
0
0
0
28
20
12
R
R
R
4
0
0
0
27
19
11
R
R
R
3
0
0
0
generated
Interrupt
for
Overflow
0: Interrupt
not
generated
1: Interrupt
INTTBOF
26
18
10
R
R
R
2
0
0
0
0
generated
Interrupt
for match
with
TBnREG1
0: Interrupt
not
generated
1: Interrupt
INTTB1
25
17
R
R
9
R
1
R
0
0
0
0
TMPM380/M382
generated
Interrupt
for match
with
TBnREG0
0: Interrupt
not
generated
1: Interrupt
INTTB0
24
16
R
R
R
8
0
0
0
0
0
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