TMP87xy48UG/DFG Toshiba, TMP87xy48UG/DFG Datasheet - Page 3

• Manufacturer Part Number: TMP87xy48UG/DFG
• Manufacturer: Toshiba

Specifications of TMP87xy48UG/DFG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16/32
• Ram Size: 512/1K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

(When the transfer clock gen-
erated by timer/counter inter-
rupt is the same as the right
bination "O" is available but please do not select the combination "–".
When UART is used, settings of RXDNC are limited depending on the transfer clock specified by BRG. The com-
The transfer clock generated by timer/counter interrupt is calculated by the following equation :
Transfer clock [Hz] = Timer/counter source clock [Hz] ÷ TTREG set value
side column)
The setting except the above
BRG setting
000
110
Caution in Setting the UART Noise Rejection Time
clock [Hz]
Transfer
fc/13
fc/16
fc/32
fc/8
(No noise rejection)
00
O
O
O
O
O
than 31/fc[s] as noise)
(Reject pulses shorter
01
O
O
O
O
–
RXDNC setting
(Reject pulses shorter
than 63/fc[s] as noise)
10
O
O
O
–
–
(Reject pulses shorter
than 127/fc[s] as
noise)
11
O
–
–
–
–
2008-09-30