FAN6204 Fairchild Semiconductor, FAN6204 Datasheet - Page 11

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FAN6204

Manufacturer Part Number
FAN6204
Description
FAN6204 is a secondary-side synchronous rectification (SR) controller to drive SR MOSFET for improving efficiency
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2010 Fairchild Semiconductor Corporation
FAN6204 • Rev. 1.0.1
Causal Function
Causal function is utilized to limit the time interval (t
MAX
the SR gate. t
switching period, as shown in Figure 22. When the
system operates at fixed frequency, whether voltage-
second balance theorem can be applied or not, causal
function can guarantee reliable operation.
Fault Causal Timing Protection
Fault causal timing protection is utilized to disable the
SR gate under some abnormal conditions. Once the
switching period (t
previous switching period (t
disabled and enters Green Mode, as shown in Figure
23. Since the rising edge of V
SR Gate
I
) from the rising edge of V
M
Figure 21. Resuming Normal Operation
Figure 22. Causal Function Operation
5.35µs
Figure 20. Entering Green Mode
Green Mode
…….
7 Times
SR-MAX
S-PWM
is limited to 97% of previous
(n)) is longer than 120% of
5.35µs
S-PWM
LPC
LPC
to the falling edge of
(n-1)), SR gate is
among switching
Normal Mode
5.35µs
SR-
11
periods (t
accuracy of switching period is important. Therefore, if
the detected switching period has a serious variation
under some abnormal conditions, the SR gate should
be terminated to prevent fault trigger.
Gate Expand Limit Protection
Gate expand limit protection controls on-time expansion
of the SR MOSFET. Once the discharge time of the
internal timing capacitor (t
previous on time of the SR MOSFET (t
t
Figure 24. When output load changes rapidly from light
load to heavy load, voltage-second balance theorem
may not be applied. In this transient state, gate expand
limit protection is activated to prevent overlap between
SR gate and PWM gate.
RES Dropping Protection
RES dropping protection prevents V
much within a cycle. The V
reference voltage, V
drops below 90% of V
time (t
as shown in Figure 25. When output voltage drops
rapidly within a switching cycle, voltage-second balance
may not be applied, RES dropping protection is
activated to prevent overlap.
on-SR
(n) is limited to 115% of t
Figure 23. Fault Causal Timing Protection
Figure 24. Gate Expand Limit Protection
RES-DROP
Figure 25. V
S-PWM
), the SR gate is turned off immediately,
) is tracked for causal function, the
RES
RES
RES
’, on V
Dropping Protection
’ for longer than a debounce
DIS.CT
LPC
) is longer than 115% of
RES
on-SR
rising edge. Once V
(n-1), as shown in
is sampled as a
RES
www.fairchildsemi.com
dropping too
on-SR
(n-1));
RES

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