FAN6204 Fairchild Semiconductor, FAN6204 Datasheet - Page 9
FAN6204
Manufacturer Part Number
FAN6204
Description
FAN6204 is a secondary-side synchronous rectification (SR) controller to drive SR MOSFET for improving efficiency
Manufacturer
Fairchild Semiconductor
Datasheet
1.FAN6204.pdf
(14 pages)
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© 2010 Fairchild Semiconductor Corporation
FAN6204 • Rev. 1.0.1
Functional Description
Linear Predict Timing Control
The SR MOSFET turn-off timing is determined by
linear-predict timing control and the operation principle
is based on the volt-second balance theorem. The volt-
second balance theorem states that the inductor
average voltage is zero during a switching period in
steady state, so the charge voltage and charge time
product is equal to the discharge voltage and discharge
time product. In flyback converters, the charge voltage
on the magnetizing inductor is input voltage (V
the discharge voltage is nV
waveforms show in Figure 18. The following equation
can be drawn:
where t
discharge time.
V
IN
t
PM ON
PM,ON
.
Figure 18. Typical Waveforms of Linear-Predict Timing Control in CCM and DCM/QR Flyback
is inductor charge time and t
n V
OUT
t
L DIS
.
OUT
, as the typical
L,DIS
is inductor
IN
), while
(1)
9
FAN6204 uses the LPC and RES pins with two sets of
voltage dividers to sense DET voltage (V
voltage (V
can be obtained. As a result, t
of SR MOSFET, can be predicted by Equation 1. As
shown in Figure 18, the SR MOSFET is turned on when
the SR MOSFET body diode starts conducting and DET
voltage drops to zero. The SR MOSFET is turned off by
linear-predict timing control.
Circuit Realization
The linear-predict timing-control circuit generates a
replica
transformer using internal timing capacitor (C
shown in Figure 19. Using the internal capacitor voltage,
the inductor discharge time (t
indirectly, as shown in Figure 18. When C
to zero, the SR controller turns off the SR MOSFET.
(V
OUT
CT
)
), respectively; so V
of
magnetizing
L,DIS
L.DIS
IN
, which is the on-time
current
/n, t
) can be detected
PM.ON
DET
T
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is discharged
) and output
of
, and V
flyback
T
), as
OUT