FDMF6708N Fairchild Semiconductor, FDMF6708N Datasheet - Page 4

• Manufacturer Part Number: FDMF6708N
• Manufacturer: Fairchild Semiconductor

© 2011 Fairchild Semiconductor Corporation
FDMF6708N • Rev. 1.0.2
Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Note:
1.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Note:
2.
Symbol
Symbol
V
V
V
I
V
V
ZCD_EN#
V
V
θ
V
THWN#
I
V
V
T
ESD
V
V
THWN#
V
V
O(AV)
V
V
DISB#
BOOT
BOOT
JPCB
T
PWM
T
SWH
DRV
PHS
STG
DRV
CIN
I
is limited by the peak DrMOS temperature, T
layout. This rating can be changed with different application
CIN
Operating at high V
during MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must
remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application
Information” and “PCB Layout Guidelines” sections of this datasheet for additional information.
GH
GL
IN
IN
A
O(AV)
J
is rated using Fairchild’s DrMOS evaluation board, at T
Supply Voltage
Drive Voltage
Output Disable
PWM Signal Input
ZCD Enable Signal Input
Low Gate Manufacturing Test Pin
Thermal Warning Flag
Power Input
Bootstrap Supply
High Gate Manufacturing Test Pin
PHASE
Switch Node Input
Bootstrap Supply
THWN# Sink Current
Output Current
Junction-to-PCB Thermal Resistance
Ambient Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Electrostatic Discharge Protection
Control Circuit Supply Voltage
Gate Drive Circuit Supply Voltage
Output Stage Supply Voltage
IN
(1)
can create excessive AC overshoots on the VSWH-to-GND and BOOT-to-GND nodes
Parameter
Parameter
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to PGND, CGND
Referenced to VSWH, PHASE
Referenced to CGND
Referenced to VSWH, PHASE
Referenced to CGND
Referenced to CGND
Referenced to PGND, CGND (DC Only)
Referenced to PGND,<20ns
Referenced to VDRV
Referenced to VDRV,<20ns
f
f
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
SW
SW
J
= 150°C, and varies depending on operating conditions and PCB
=300kHz, V
=1MHz, V
4
IN
=12V, V
IN
=12V, V
settings.
A
= 25°C, with natural convection cooling. This rating
O
=1.0V
O
=1.0V
Min.
4.5
4.5
3.0
Min.
2000
2500
Typ.
12.0
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-8.0
-0.1
-0.3
-0.3
-0.3
-0.3
-0.3
-40
-55
5.0
5.0
24.0
Max.
Max.
+125
+150
+150
30.0
30.0
30.0
30.0
30.0
33.0
22.0
25.0
5.5
5.5
7.0
7.0
7.0
7.0
7.0
7.0
7.0
7.0
7.0
7.0
3.5
50
45
(2)
www.fairchildsemi.com
°C/W
Unit
Unit
mA
°C
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
V
V
V