BTM 7742G Infineon Technologies, BTM 7742G Datasheet - Page 21

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BTM 7742G

Manufacturer Part Number
BTM 7742G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of BTM 7742G

Packages
PG-DSO-36
Operating Range
5.5 - 28.0 V
Rds (on) (typ)
250.0 mOhm
Id(lim)
12.0 A
Iq (typ)
5.0 µA
Diagnosis
OV, OT, OC-failure flag, current sense
7
Note: The following information is given as a hint for the implementation of the device only and shall not be
Figure 15
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
7.1
Due to the fast switching times for high currents, special care has to be taken during the PCB layout. Stray
inductances have to be minimized in the power bridge design as it is necessary in all switched high power bridges.
The BTM7742G has no separate pin for power ground and logic ground. Therefore it is recommended to ensure
that the offset between power ground and logic ground pins of the device is minimized. It is also
necessary to ensure that all VS pins are at the same voltage level. Therefore the VS pins need to be
shorted together. Voltage differences between the VS pins may cause parameter deviations (such as reduced
current limits and current sense ratio (kilis)) up to a latched shutdown of the device with error signal on the IS pin,
similar to overtemperature shutdown.
Due to the fast switching behavior of the device in current limitation mode or overvoltage lock out a low ESR
electrolytic capacitor
peaks and drops on VS. This is recommended for both PWM and non PWM controlled applications. The value of
the capacitor must be verified in the real application.
In addition a ceramic capacitor
the switching phase via a low inductance path and therefore reducing noise and ground bounce. A reasonable
value for this capacitor would be about 470 nF.
Data Sheet
regarded as a description or warranty of a certain functionality, condition or quality of the device.
I/O
XC866
Application Information
Application Diagram
Application and Layout Considerations
I/O
Microcontroller
I/O
1kΩ
R
C
I/O
IS
s
4.7kΩ
4.7kΩ
4.7kΩ
of at least 100 µF from VS to GND is recommended. This prevents destructive voltage
R
R
R
I/O
IN1
IN2
INH
I/O
BTM7742G
Reset
C
INH
IN1
IN2
IS
Vdd
I/O
Vss
sc
from VS to GND close to each device is recommended to provide current for
HS1
LS1
22µF
C
Q
VS
GND
47nF
C
D
HS2
LS2
VS
GND
OUT1
OUT2
WO
RO
Q
D
21
Voltage Regulator
4278G
GND
TLE
C
Sc
I
C
S
R
D1
R
10V
10kΩ
D2
D
Z1
R
High Current H-Bridge
Reverse Polarity
1
Protection
Application Information
M
IPD50P03P4L-11
Rev. 1.0, 2010-05-28
e.g.
V
BTM7742G
S

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