TLE 8201R Infineon Technologies, TLE 8201R Datasheet - Page 23

• Manufacturer Part Number: TLE 8201R
• Manufacturer: Infineon Technologies

Specifications of TLE 8201R

• Packages: PG-DSO-36
• Ipeak: 8.0 A peak for OUT 1.2 ; 6.25 A peak for OUT 7
• Inhibit: Y
• Iq (typ): 0.2 µA2.5 µA
• Mounting: SMT
• Technology: BCD

power Stage x, xsel1 and xsel2 are LOW, the power stage x is controlled only via the SPI
control bit xON. If the selection bit xsel1 is HIGH and the control bit xON is also high, the
power stage x is controlled by the PWM1 pin (xsel2 and PWM2, respectively). The
behavior is shown in the pricipal schematic and truth table below. In terms of power
dissipation due to switching loss, a PWM frequency below 200 Hz is recommended.
Figure 8
Data Sheet Rev. 2.0
PWM1
PWM2
CSN
CLK
DO
DI
S
P
I
PWM input and SPI control registers
1
1
xsel2
xsel1
xON
&
&
control logic of power transistor x
>=1
23
x {LS1, LS2, LS3, HS7, HS8, HS9,
&
HS10, HS11}
Gate
driver
transistor x
power
TLE 8201R
2006-06-07
OUT x