TLE 8203E Infineon Technologies, TLE 8203E Datasheet - Page 16

• Manufacturer Part Number: TLE 8203E
• Manufacturer: Infineon Technologies

Specifications of TLE 8203E

• Packages: PG-DSO-36
• Ipeak: 6.25 A for OUT 7
• Inhibit: Y
• Iq (typ): 0.2 µA2.5 µA
• Mounting: SMT
• Technology: BCD

Figure 5
7.4.1
In addition to the 16 bits transferred from the TLE 8203E to the SPI master, an additional Error Flag (EF) is
transmitted at the DO pin. The EF status is shown on the DO pin after CSN H -> L, before the first rising edge at
CLK, as shown in
The Error flag is set to H if any of the Status Registers contains an error message (i.e. EF = EF_00 or EF_01 or
EF_10 or EF_11).
Figure 6
Final Data Sheet
Com-
ment
CSN
SO
SI
After Power-ON Reset, Status
Register 00 is sent by default
Status Register Addressing and Reset
Error-Flag
Error Flag Transmission on DO during Standard SPI Transmission (top), or without Additional
SPI Transmission, CLK Low (bottom)
x x x x x
x x x x x
Figure
0
x
6.
CSN
CLK
CSN
CLK
0
x
DO
DO
1
x
Z
Z
Status Register 01 is transferred to
SPI master, but not reset after
EF
x x x x x
x x x x x
transmission
bit15
EF
1
x
16
1
x
0
x
bit14
Status Register 10 is transferred to
bit13
Z
SPI master, and reset after
x x x x x
x x x x x
transmission
bit12
0
x
1
x
1
x
Rev. 1.0, 2009-02-04
StatReg10 is reset
after CSN
TLE 8203E
L->H
t
SPI