TLE6251-3G Infineon Technologies, TLE6251-3G Datasheet - Page 5
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TLE6251-3G
Manufacturer Part Number
TLE6251-3G
Description
Manufacturer
Infineon Technologies
Datasheet
1.TLE6251-3G.pdf
(36 pages)
Specifications of TLE6251-3G
Packages
PG-DSO-14
Transmission Ratemax
1.0 Mbit/s
Quiescent Current (max.)
< 30 µA @ 5V standby
Bus Wake-up Capability
Yes
Additional Features
NSTB, WK, EN, NERR, INH, Vio, no SPLIT PIN
Wake-up Inputs
Bus wake-up + wake-up pin
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TLE6251-3G
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
3
3.1
Figure 2
3.2
9
Table 1
Pin
1
2
3
4
5
6
Data Sheet
Symbol
TxD
GND
V
RxD
V
EN
CC
IO
Pin Configuration
Pin Assignment
Pin Configuration
Pin Definitions and Functions
Pin Definitions and Functions
TxD
GND
V
RxD
V
EN
INH
CC
IO
Function
Transmit Data Input;
integrated pull-up resistor to
Ground
Transceiver Supply Voltage;
100 nF decoupling capacitor to GND recommend.
Receive Data Output;
“Low” in “Dominant” state.
Output voltage level dependent on the
Logic Supply Voltage;
Digital Supply Voltage for the logic pins TxD, RxD, EN, NERR and NSTB;
Usually connected to the supply voltage of the external microcontroller;
100 nF decoupling capacitor to GND recommend.
Mode Control Input;
Integrated pull-down resistor;
“High” for Normal Operation mode.
1
2
3
4
5
6
7
5
V
IO
, “Low” for “Dominant” state.
14
13
12
11
10
9
8
V
IO
supply
CANH
NERR
NSTB
CANL
N.C.
WK
V
S
Rev. 1.1, 2011-06-06
Pin Configuration
TLE6251-3G