IFX 91041EJ V50 Infineon Technologies, IFX 91041EJ V50 Datasheet - Page 7

• Manufacturer Part Number: IFX 91041EJ V50
• Manufacturer: Infineon Technologies

Specifications of IFX 91041EJ V50

• Packages: PG-DSO-8
• Comment: VQ fixed to 5.0V; Tolerance 2% up to 1000mA; DSO-8 EP
• Vq (max): 5.0 V
• Iq (max): 1,800.0 mA
• Iq (typ): 7,000.0 µA
• Output: Buck Converter

5
5.1
The gate of the power switch is driven by the external capacitor connected to pin BDS (Buck Driver Supply) using
the bootstrap principle. An integrated under voltage lockout function supervising the ’bootstrap’ capacitor voltage
ensures that the device is always driven with a sufficient bootstrap voltage in order to prevent from extensive heat
up of the power transistor. An integrated charge pump supports the gate drive in case of low input supply voltage,
small differential voltage between input supply and output voltage at low current and during startup. In order to
minimize emission, the charge pump is switched off if the input voltage is sufficient for supplying the bootstrap.
The soft start function generates a defined ramp of the output voltage during the first 0.5 ms (typ.) after device
initialization. The device initialization is triggered either by the EN voltage level crossing the turn-on threshold,
rising supply voltage (during EN=H), and also when the device restarts a after thermal shutdown. The ramp starts
after the BDS external capacitor is charged.
The regulation scheme uses a voltage controlled pulse width modulation with feed forward path (the feed forward
operates for supply voltages from 8.0V to 36V) which provides a fast line transient reaction.
In order to maintain the output voltage regulation even under low duty cycle conditions (light load conditions down
to ICC=0mA, high input voltage) a pulse skipping operation mode is implemented. Pulse skipping is also used for
operation with low supply voltages, related to high duty cycles >92%
In case of a lost connection to the pin FB , an internal pull-up current prevents from a uncontrolled rise of the output
voltage (version IFX91041EJV only).
Figure 3
Data Sheet
COMP
SYNC
FB
ΔV=k
Feedforward
0.6 V
V
Ref
V
X
V
max
V
min
=
Buck Regulator
Description
S
Block Diagram Buck Regulator
Oscillator
t
Generator
r
Soft start
Ramp
t
f
t
r
t
Error
Amp.
Error -Signal
Ramp
Error -Ramp
V
V
high
Schmitt-Trigger 1
low
PWM
Comp.
t
r
t
f
H when
Error -Signal <
Error -Ramp
t
r
L when
T
L when
Output
overvoltage
j
> 175 °C
t
Clock
R
S
Output Stage
OFF when H
Error -FF
&
&
OFF
when H
Q
Q
7
L when Overcurrent
NOR1
>1
_
NAND 2
&
R
S
PWM-FF
&
&
H when
UV at
Charge
Pump
Q
Q
V
H =
OFF
BDS
OC
Comp.
INV
1
BDS
UV Comp.
H =
ON
Gate Driver
Supply
Gate
Driver
Rev. 1.1, 2011-07-08
=
=
Buck Regulator
IFX91041
D-MOS
Power
V
BDS
BUO
S