IFX 80471SK V50 Infineon Technologies, IFX 80471SK V50 Datasheet - Page 24

• Manufacturer Part Number: IFX 80471SK V50
• Manufacturer: Infineon Technologies

Specifications of IFX 80471SK V50

• Packages: PG-DSO-14
• Comment: Vin up to 60V; external MOS; PG-DSO-14
• Vq (max): 5.0 V
• Iq (max): 2,300.0 mA
• Iq (typ): 130.0 µA
• Output: Buck Converter

The drop- or dropout voltage is defined as the difference between the input and output voltage levels when the
input is low enough to drop the output out of regulation. Dropout depends on the MOSFET drain-to-source on-
resistance, the current-sense resistor and the inductor series resistance. It is proportional to the load current:
7.6
The IFX80471’s internal oscillator is set for a fixed PWM switching frequency of 360kHz or can be synchronized
to an external clock at the SYNC pin. When the internal clock is used SYNC has to be connected to GND. SYNC
is a negative-edge triggered input that allows synchronization to an external frequency ranging between 270kHz
and 530kHz. When SYNC is clocked by an external signal, the converter operates in PWM mode until the load
current drops below the PWM to PFM threshold. Thereafter the converter continues operation in PFM mode.
7.7
Connecting ENABLE to GND places the IFX80471SKV in shutdown mode. In shutdown, the reference, control
circuitry, external switching MOSFET, and the oscillator are turned off and the output falls to 0V. Connect ENABLE
to voltages higher than 4.5V for normal operation. As this input operates analogue way the voltage applied at this
pin should have a slope of 0.5V/3µs as a minimum requirement to avoid undefined states within the device.
7.8
A typical choice of external components for the buck converter circuit is given in
operation of the buck converter the input capacitors C
R
addition for low electromagnetic emission a Pi-filter at the input and/or a small resistor in the path between GDRV
and the gate of the PMOS may be necessary.
7.8.1
The internal PWM/PFM control loop includes a slope compensation for stable operation in PWM mode. This slope
compensation is optimized for inductance values of 47µH and Sense resistor values of 47mΩ for the 5V output
voltage versions. When choosing an inductance different from 47µH the Sense resistor has to be changed also:
Increasing this ratio above 1000 Ω/H may result in sub harmonic oscillations as well-known for peak current mode
regulators without integrated slope compensation.
To achieve the same effect of slope compensation in the adjustable voltage version also the inductance in µH is
given by
Data Sheet
SENSE
, the PMOS device, the catch diode D1, the inductance L1 and the output capacitor C
SYNC Input and Frequency Control
Shutdown Mode
Buck converter circuit
Buck inductance (L1) selection in terms of ripple current
V
drop
=
I
LOAD
⋅
R
-------------------
(
SENSE
R
L1
DS ON
(
=
)PMOS
IN1
(0,5...1,0 )
23
, C
+
IN2
R
, the driver supply capacitor C
SENSE
×10
3
Ω
--- -
H
+
R
INDUCTANCE
Figure 5
)
Application Information
and
BDS
Rev. 1.0, 2011-02-07
OUT
Figure
, the sense resistor
are necessary. In
IFX80471
6. For basic