SAF-C161K-LM Infineon Technologies, SAF-C161K-LM Datasheet - Page 46

• Manufacturer Part Number: SAF-C161K-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161K-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.0 KByte
• Program Memory: 0.0 KByte

Multiplexed Bus (Standard Supply Voltage Range) (cont’d)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD
Data valid to WR
Data hold after WR
ALE rising edge after RD,
WR
Address hold after RD,
WR
ALE falling edge to CS
CS low to Valid Data In
CS hold after RD, WR
ALE fall. edge to RdCS,
WrCS (with RW delay)
ALE fall. edge to RdCS,
WrCS (no RW delay)
Data Sheet
(no RW-delay)
(with RW-delay)
(no RW-delay)
1)
1)
1)
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
A
13
14
15
16
17
18
19
22
23
25
27
38
39
40
42
43
+
t
CC 50 +
CC 20 +
CC 26 +
CC 26 +
CC 26 +
CC -4 -
CC 46 +
CC 16 +
CC -4 +
SR –
SR –
SR –
SR –
SR 0
SR –
SR –
C
+
t
F
min.
Max. CPU Clock
(120 ns at 25 MHz CPU clock without waitstates)
t
= 25 MHz
t
A
t
t
t
t
t
t
t
42
A
C
C
F
F
F
F
A
max.
–
20 +
40 +
40 +
+
50 + 2
+
–
26 +
–
–
–
–
10 -
40 +
+ 2
–
–
–
t
t
C
C
t
A
t
t
t
t
t
t
A
C
C
A
F
C
t
A
1 / 2TCL = 1 to 25 MHz
min.
3TCL - 10
+
–
–
–
–
0
–
2TCL - 20
+
2TCL - 14
+
2TCL - 14
+
2TCL - 14
+
- 4 -
–
3TCL - 14
+
TCL - 4
+
-4
+
Variable CPU Clock
t
t
t
t
t
t
t
t
C
C
F
F
F
F
A
A
t
A
max.
–
2TCL - 20
+
3TCL - 20
+
3TCL - 20
+
4TCL - 30
+ 2
–
2TCL - 14
+
–
–
–
–
10 -
3TCL - 20
+
–
–
–
t
t
t
t
t
C
C
A
F
C
t
A
+
t
+ 2
V2.0, 2001-01
A
+
t
C
t
t
C
A
C161O
C161K
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns