SAK C167CS-4RM-CA+ Infineon Technologies, SAK C167CS-4RM-CA+ Datasheet - Page 63

• Manufacturer Part Number: SAK C167CS-4RM-CA+
• Manufacturer: Infineon Technologies

Specifications of SAK C167CS-4RM-CA+

• Packages: PG-MQFP-144
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 11.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 32.0 KByte

AC Characteristics
External Clock Drive XTAL1
(Operating Conditions apply)
Table 12
Parameter
Oscillator period
High time
Low time
Rise time
Fall time
1)
2)
3)
Figure 13
Note: If the on-chip oscillator is used together with a crystal, the oscillator frequency is
Data Sheet
The minimum and maximum oscillator periods for PLL operation depend on the selected CPU clock generation
mode. Please see respective table above.
The clock input signal must reach the defined levels
The minimum high and low time refers to a duty cycle of 50%. The maximum operating frequency (
direct drive mode depends on the duty cycle of the clock input signal.
limited to a range of 4 MHz to 40 MHz.
It is strongly recommended to measure the oscillation allowance (or margin) in the
final target system (layout) to determine the optimum parameters for the oscillator
operation. Please refer to the limits specified by the crystal supplier.
When driven by an external clock signal it will accept the specified frequency
range. Operation at lower input frequencies is possible but is guaranteed by
design only (not 100% tested).
2)
2)
2)
2)
0.5
External Clock Drive Characteristics
External Clock Drive XTAL1
V
DD
Symbol
t
t
t
t
t
OSC
1
2
3
4
SR 25
SR 12
SR 12
SR –
SR –
t
1
min.
Direct Drive
3)
3)
1:1
max.
–
8
8
–
–
59
t
V
2
IL2
min.
20
5
5
–
–
and
Prescaler
V
t
t
OSC
IH2
3
2:1
.
max.
–
–
–
5
5
min.
37
10
10
–
–
1)
t
4
MCT02534
PLL
1:N
V
V
IH2
IL
max.
500
–
–
10
10
C167CS-4R
V2.2, 2001-08
C167CS-L
1)
Unit
ns
ns
ns
ns
ns
f
CPU
) in