AT49BV040B ATMEL Corporation, AT49BV040B Datasheet

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AT49BV040B

Manufacturer Part Number
AT49BV040B
Description
Manufacturer
ATMEL Corporation
Datasheet

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Features
1. Description
The AT49BV040B is a 2.7V to 5.5V in-system reprogrammable Flash Memory. Its
4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with
Atmel’s advanced nonvolatile CMOS technology, the device offers an access time of
70 ns (V
power dissipation over the industrial temperature range with V
mW and is 110 mW with V
When the device is deselected, the CMOS standby current is less than 30 µA. To
allow for simple in-system reprogrammability, the AT49BV040B does not require high
input voltages for programming. Reading data out of the device is similar to reading
from an EPROM; it has standard CE, OE, and WE inputs to avoid bus contention.
Reprogramming the AT49BV040B is performed by erasing a sector of data and then
programming on a byte by byte basis. The byte programming time is a fast 10 µs. The
end of a program or erase cycle can be optionally detected by the DATA polling or
toggle bit feature. Once the end of a byte program cycle has been detected, a new
access for a read or program can begin. The typical number of program and erase
cycles is in excess of 100,000 cycles.
The device is erased by executing a chip erase or a sector erase command sequence;
the device internally controls the erase operations. The memory array of the
AT49BV040B is organized into two 8K byte parameter sectors, eight main memory
sectors, and one boot sector.
The device has the capability to protect the data in the boot sector; this feature is
enabled by a command sequence. The 16K-byte boot sector includes a reprogram-
ming lock out feature to provide data integrity. The boot sector is designed to contain
user secure code, and when the feature is enabled, the boot sector is permanently
protected from being reprogrammed.
Single Supply for Read and Write: 2.7V to 5.5V
Fast Read Access Time – 70 ns (V
Internal Program Control and Timer
Flexible Sector Architecture
Fast Erase Cycle Time – 8 Seconds
Byte-by-Byte Programming – 10 µs/Byte Typical
Hardware Data Protection
DATA Polling or Toggle Bit for End of Program Detection
Low Power Dissipation
Minimum 100,000 Write Cycles
– One 16K Bytes Boot Sector with Programming Lockout
– Two 8K Bytes Parameter Sectors
– Eight Main Memory Sectors (One 32K Bytes, Seven 64K Bytes)
– 20 mA Active Current
– 25 µA CMOS Standby Current for V
– 30 µA CMOS Standby Current for V
CC
= 2.7V to 3.6V) and an access time of 55 ns (V
CC
= 4.5V to 5.5V.
CC
= 2.7V to 3.6V); 55 ns (V
CC
CC
= 2.7V to 3.6V
= 4.5V to 5.5V
CC
CC
CC
= 4.5V to 5.5V)
= 4.5V to 5.5V). The
= 2.7V to 3.6V is 72
4-megabit
(512K x 8)
Flash Memory
AT49BV040B
3499B–FLASH–4/06

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AT49BV040B Summary of contents

Page 1

... Reading data out of the device is similar to reading from an EPROM; it has standard CE, OE, and WE inputs to avoid bus contention. Reprogramming the AT49BV040B is performed by erasing a sector of data and then programming on a byte by byte basis. The byte programming time is a fast 10 µs. The end of a program or erase cycle can be optionally detected by the DATA polling or toggle bit feature ...

Page 2

... Pin Configurations Pin Name A0 - A18 I/O0 - I/O7 2.1 32-lead PLCC Top View 2.2 32-lead VSOP or 32-lead TSOP Top View – Type 1 AT49BV040B 2 Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs ...

Page 3

... Read The AT49BV040B is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever high. This dual-line con- trol gives designers flexibility in preventing bus contention ...

Page 4

... Data in the main memory and parameter sectors can still be changed through the regular programming method. To activate the lockout feature, a series of six program commands to specific addresses with specific data must be performed. See page 7. AT49BV040B 4 “Command Definition Table” on page cycle time. The DATA polling or toggle bit feature may also BP “ ...

Page 5

... Data Polling The AT49BV040B features DATA polling to indicate the end of a program or erase cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all out- puts and the next cycle may begin. DATA polling may begin at any time during the program cycle. During a chip or sector erase operation, an attempt to read the device will give a “ ...

Page 6

... VA = Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. I/O7 should be rechecked even if I/O5 = “1” because I/O7 may change simultaneously with I/O5. AT49BV040B 6 Figure 4-2. YES YES Program/Erase Operation ...

Page 7

... AA AAA 55 555 555 AA AAA 55 555 555 AA AAA 55 555 555 AA AAA 55 555 555 AA AAA 55 555 XXX F0 *NOTICE: + 0.6V CC AT49BV040B 3rd Bus 4th Bus 5th Bus Cycle Cycle Cycle Data Addr Data Addr 80 555 AA AAA 80 555 AA AAA A0 Addr 555 AA AAA 90 F0 Stresses beyond those listed under “Absolute Maxi- mum Ratings” ...

Page 8

... Parameter Sector 2 Main Memory Sector 1 Main Memory Sector 2 Main Memory Sector 3 Main Memory Sector 4 Main Memory Sector 5 Main Memory Sector 6 Main Memory Sector 7 Main Memory Sector 8 AT49BV040B 8 Sector Size Sector Address Range 16K Bytes 8K Bytes 8K Bytes 32K Bytes 64K Bytes 64K Bytes ...

Page 9

... I 0. MHz OUT 0 2 -400 µA 2.4 OH AT49BV040B AT49BV040B -40°C - 85°C 2.7V - 3.6V or 4.5V to 5. OUT High Z High Z ( Manufacturer Code ( Device Code ...

Page 10

... AC Read Waveforms ADDRESS OUTPUT Notes may be delayed may be delayed without impact ACC specified from whichever occurs first ( pF This parameter is characterized and is not 100% tested. AT49BV040B 10 2.7V to 3.6V Min (1)(2)(3)(4) ADDRESS VALID ...

Page 11

... Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 3499B–FLASH–4/ 1.8K OUTPUT PIN 30 pF 1.3K Max 6 12 AT49BV040B AC MEASUREMENT LEVEL Units Conditions OUT 11 ...

Page 12

... Data Set-up Time Data, OE Hold Time DH OEH t Write Pulse Width High WPH 17. AC Byte Load Waveforms 17.1 WE Controlled OE ADDRESS CE WE DATA IN 17.2 CE Controlled OE ADDRESS WE CE DATA IN AT49BV040B 12 2.7V to 3.6V Min Max OES t OEH WPH ...

Page 13

... Min ( WPH 555 AAA 555 555 BYTE 0 BYTE 1 BYTE 2 BYTE 3 7.) AT49BV040B Typ Max 10 120 8 900 AAA Note Note 3 BYTE 4 BYTE 5 Units µ seconds ms 13 ...

Page 14

... Notes: 1. Toggling either both OE and CE will operate toggle bit. The t specification must be met by the toggling input(s). OEHP 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. AT49BV040B OEH OEHP t OE ...

Page 15

... Additional Device Code is read for address 0003H 3. The device does not remain in identification mode if powered down. 4. The device returns to standard operation mode. 5. Manufacturer Code: 1FH Device Code: 13H. Additional Device Code: 10H. AT49BV040B 15 27. Boot Block Lockout Feature Enable Algorithm LOAD DATA F0 TO ANY ADDRESS Notes: 1. Data Format: I/O7 - I/O0 (Hex) ...

Page 16

... AT49BV040B-JU 20 AT49BV040B-TU AT49BV040B-VU 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32T 32-lead, Thin Small Outline Package (TSOP) 32V 32-lead, Thin Small Outline Package (VSOP) AT49BV040B 16 Package 32J 32T 32V Package Type Operation Range Industrial (-40° to 85° C) 3499B–FLASH–4/06 ...

Page 17

... Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R 3499B–FLASH–4/06 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) AT49BV040B 0.318(0.0125) 0.191(0.0075 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 3.175 – ...

Page 18

... This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT49BV040B 18 PIN SEATING PLANE ...

Page 19

... Orchard Parkway San Jose, CA 95131 R 3499B–FLASH–4/06 PIN SEATING PLANE A1 TITLE 32V, 32-lead ( Package) Plastic Thin Small Outline Package, Type I (VSOP) AT49BV040B 0º ~ 8º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – ...

Page 20

... Revision History Revision No. Revision A – Sept. 2005 Revision B – April 2006 AT49BV040B 20 History • Initial Release • Combined the 3V and 5V part into one datasheet (BV). • Removed the speed of the part form the ordering information table. • Changed the address hold time to 20 ns. ...

Page 21

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life © Atmel Corporation 2006. All rights reserved. Atmel registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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