EM78P156EL ELAN Microelectronics Corp, EM78P156EL Datasheet

no-image

EM78P156EL

Manufacturer Part Number
EM78P156EL
Description
Manufacturer
ELAN Microelectronics Corp
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EM78P156ELKMJ-G
Manufacturer:
EMC
Quantity:
1
Part Number:
EM78P156ELKMS-G
Manufacturer:
EMC
Quantity:
20 000
Part Number:
EM78P156ELM
Manufacturer:
EMC
Quantity:
588
Part Number:
EM78P156ELM
Manufacturer:
EMC
Quantity:
20 000
Part Number:
EM78P156ELM
Manufacturer:
ELAN
Quantity:
9 184
Part Number:
EM78P156ELM-G
Manufacturer:
EM
Quantity:
20 000
Part Number:
EM78P156ELM-G
Manufacturer:
ELAN
Quantity:
12 359
Part Number:
EM78P156ELM-GJ
Manufacturer:
ELAN
Quantity:
8 223
Part Number:
EM78P156ELMG
Manufacturer:
NSC
Quantity:
4 600
Part Number:
EM78P156ELMJ
Manufacturer:
Elan
Quantity:
12 257
Part Number:
EM78P156ELMJ-G
Manufacturer:
ELAN
Quantity:
16
Part Number:
EM78P156ELMS-G
Manufacturer:
ELAN
Quantity:
1 283
Part Number:
EM78P156ELP
Manufacturer:
EMC
Quantity:
472
Part Number:
EM78P156ELPJ
Manufacturer:
EMC
Quantity:
20 000
Part Number:
EM78P156ELPJ
Manufacturer:
Elan
Quantity:
8 744
1. GENERAL DESCRIPTION
This specification is subject to change without prior notice.
EM78P156EL is an 8-bit microprocessor designed and developed with low-power and high-speed CMOS
technology. It is equipped with 1K*13-bits Electrical One Time Programmable Read Only Memory
(OTP-ROM). It provides a PROTECTION bit to prevent user’s code in the OTP memory from being
intruded. 6 OPTION bits are also available to meet user’s requirements.
With its OTP-ROM feature, the EM78P156EL is able to offer a convenient way of developing and verifying
user’s programs. Moreover, user can take advantage of EMC Writer to easily program his development
code.
1
EM78P156EL
OTP ROM
2002/04/19

Related parts for EM78P156EL

EM78P156EL Summary of contents

Page 1

... It provides a PROTECTION bit to prevent user’s code in the OTP memory from being intruded. 6 OPTION bits are also available to meet user’s requirements. With its OTP-ROM feature, the EM78P156EL is able to offer a convenient way of developing and verifying user’s programs. Moreover, user can take advantage of EMC Writer to easily program his development code ...

Page 2

... Programmable free running watchdog timer • 8 programmable pull-high pins • 7 programmable pull-down pins • 8 programmable open-drain pins • 2 programmable R-option pins • Package types pin DIP 300mil * 18 pin SOP(SOIC) 300mil : EM78P156ELM This specification is subject to change without prior notice. : EM78P156ELP 2 EM78P156EL OTP ROM 2002/04/19 ...

Page 3

... SSOP 209mil * 20 pin SSOP 209mil • 99.9% single instruction cycle commands • The transient point of system frequency between HXT and LXT is around 400KHz This specification is subject to change without prior notice. : EM78P156ELAS : EM78P156ELKM 3 EM78P156EL OTP ROM 2002/04/19 ...

Page 4

... TCC 3 16 /RESET 4 15 VSS 5 14 P60//INT 6 13 P61 7 12 P62 8 11 P63 9 10 DIP SOP SOIC Table 1 EM78P156ELP and EM78P156ELM Pin Description Symbol Pin No. Type VDD 14 - OSCI 16 I OSCO 15 I/O TCC 3 I /RESET 4 I 17, 18, P50~P53 I P60~P67 6~13 I/O /INT ...

Page 5

... Table 2 EM78P156ELAS Pin Description Symbol Pin No. Type VDD 15 - OSCI 17 I OSCO 16 I/O TCC 4 I /RESET 5 I 18, 19, P50~P53 I P60~P67 7~14 I/O /INT 7 I VSS 6 - Table 3 EM78P156ELKM Pin Description Symbol Pin No. Type VDD 15,16 - OSCI 18 I OSCO 17 I/O TCC 3 I /RESET 4 I 19, 20, P50~P53 I P60~P67 ...

Page 6

... TCC /INT WDT Timer IOCA Interrupt Instruction Control Instruction RAM R4 DATA & CONTROL BUS IOC5 Fig. 2 Function Block Diagram 6 EM78P156EL P C ROM Register Decoder R3 IOC6 ...

Page 7

... All instruction are single instruction cycle (fclk/2 or fclk/4) except for the instruction that would change the contents of R2. Such instruction will need one more instruction cycle This specification is subject to change without prior notice 000 PAGE 0 3FF Fig. 3 Program Counter Organization 7 EM78P156EL OTP ROM CALL Stack 1 Stack 2 RET Stack 3 RETL Stack 4 RETL K Stack 5 ...

Page 8

... Bit 0 (C) Carry flag • Bit 1 (DC) Auxiliary carry flag • Bit 2 (Z) Zero flag. This specification is subject to change without prior notice. Stack (5 level) Fig. 4 Data Memory Configuration GP0 EM78P156EL OTP ROM IOC5 IOC6 IOCA IOCB IOCC IOCD IOCE IOCF ...

Page 9

... IOCF is the interrupt mask register. • Note that the result of reading RF is the "logic AND" and IOCF. 8. R10 ~ R3F • All of these are 8-bit general-purpose registers. This specification is subject to change without prior notice EM78P156EL OTP ROM EXIF ICIF TCIF 2002/04/19 ...

Page 10

... Only the lower 4 bits of IOC5 can be defined. • IOC5 and IOC6 registers are both readable and writable. This specification is subject to change without prior notice PSR0 TCC Rate 0 1:2 1 1:4 0 1:8 1 1:16 0 1:32 1 1:64 0 1:128 1 1:256 10 EM78P156EL PAB PSR2 PSR1 WDT Rate 1:1 1:2 1:4 1:8 1:16 1:32 1:64 1:128 OTP ROM 0 PSR0 2002/04/19 ...

Page 11

... Bit 7 (OD7) Control bit is used to enable the open-drain of P67 pin. • IOCC Register is both readable and writable. This specification is subject to change without prior notice /PD5 /PD4 - OD5 OD4 OD3 11 EM78P156EL OTP ROM /PD2 /PD1 /PD0 OD2 OD1 OD0 2002/04/19 ...

Page 12

... P51 pin or/and P50 pin to VSS with a 430KΩ external resistor (Rex). If the Rex is connected/disconnected, the status of P50 (P51) is read as "0"/"1". Refer to Fig. 8. • Bits 0~3,5 Not used. This specification is subject to change without prior notice /PH5 /PH4 /PH3 ROC - 12 EM78P156EL OTP ROM /PH2 /PH1 /PH0 2002/04/19 ...

Page 13

... Individual interrupt is enabled by setting its associated control bit in the IOCF to "1". • Global interrupt is enabled by the ENI instruction and is disabled by the DISI instruction. Refer to Fig. 10. • IOCF register is both readable and writable. This specification is subject to change without prior notice EM78P156EL OTP ROM EXIE ICIE TCIE 2002/04/19 ...

Page 14

... SYNC cycles TCC overflow interrupt TS PAB 0 M 8-bit Counter PAB 8-to-1 MUX 0 1 MUX WDT time-out Fig. 5 Block Diagram of TCC and WDT 14 EM78P156EL OTP ROM 1 (default). Data Bus TCC (R1) M IOCA U X PAB Initial value PSR0~PSR2 PAB 2002/04/19 ...

Page 15

... Fig. 6 The Circuit of I/O Port and I/O Control Register for Port 5 This specification is subject to change without prior notice. PCRD CLK CLK NOTE: Pull-down is not shown in the figure. 15 EM78P156EL PCWR PDWR PDRD OTP ROM IOD 2002/04/19 ...

Page 16

... CLK INT PCRD CLK CLK CLK EM78P156EL PCWR IOD PDWR T10 PDRD PCWR IOD PDWR TIN PDRD OTP ROM 2002/04/19 ...

Page 17

... Port 6 Change Wake-Up function. (CODE Option Register and Bit 11 (ENWDTB-) set to “1”). This specification is subject to change without prior notice Usage of Port 6 input status changed Wake-up/Interrupt 1 (using very carefully) 17 EM78P156EL Interrupt RE.1 ENI Instruction CLK ...

Page 18

... VCC Weakly Pull-up PORT Rex* Fig. 8 The Circuit of I/O Port with R-option(P50,P51) This specification is subject to change without prior notice *The Rex is 430K ohm external resistor 18 EM78P156EL PCRD CLK PCWR PDWR C L PDRD OTP ROM IOD ...

Page 19

... WDT time-out (if enabled), or (3) Port 6 input status changes (if enabled). The first two cases will cause the EM78P156EL to reset. The T and P flags of R3 can be used to determine the source of the reset (wake-up). The last case is considered the continuation of program execution and the global interrupt ("ENI" or "DISI" being executed) decides whether or not the 1 NOTE: Vdd = 5V, set up time period = 16.8ms ± ...

Page 20

... WDT is enabled before SLEP, Port 6 Input Status Change Interrupt must be disabled. Hence, the EM78P156EL can be awakened only by Case Refer to the section on Interrupt. If Port 6 Input Status Change Interrupt is used to wake-up the EM78P156EL (Case [a] above), the following instructions must be executed before SLEP: ...

Page 21

... Bit Name - - Power- Bit Name X X Power- Bit Name P67 P66 Power- EM78P156EL OTP ROM Bit 5 Bit 4 Bit 3 Bit 2 Bit C53 C52 C65 C64 C63 C62 1 1 ...

Page 22

... Bit Name WDTE EIS Power- Bit Name X X Power- Bit Name - - Power- EM78P156EL OTP ROM Bit 5 Bit 4 Bit 3 Bit 2 Bit EXIF ICIF ...

Page 23

... Previous value before reset Oscillator Power-on Reset Voltage Detector WDTE /RESET This specification is subject to change without prior notice. Event VDD D CLK CLR WDT Timeout WDT Fig. 9 Block Diagram of Controller Reset 23 EM78P156EL OTP ROM ...

Page 24

... P60 pin configured as /INT is excluded from this function. The Port 6 Input Status Changed Interrupt can wake up the EM78P156EL from the sleep mode if Port 6 is enabled prior to going into the sleep mode by executing SLEP. When the chip wakes-up, the controller will continue to execute the succeeding address if the global interrupt is disabled or branch to the interrupt vector 008H if the global interrupt is enabled ...

Page 25

... Oscillator 1. Oscillator Modes The EM78P156EL can be operated in three different oscillator modes, such as External RC oscillator mode (ERC), High XTAL oscillator mode (HXT), and Low XTAL oscillator mode (LXT). User can select one of them by programming MS and HLF in the CODE option register. Table 8 depicts how these three modes are defined ...

Page 26

... Conditions Two cycles with two clocks 2. Crystal Oscillator/Ceramic Resonators (XTAL) EM78P156EL can be driven by an external clock signal through the OSCI pin as shown in Fig. 11 below. In the most applications, pin OSCI and pin OSCO can connected with a crystal or ceramic resonator to generate oscillation. Fig. 12 depicts such circuit. The same thing applies whether the HXT mode or in the LXT mode ...

Page 27

... This specification is subject to change without prior notice. Frequency Mode HXT LXT HXT 330 7404 7404 Fig. 13 Circuit for Crystal/Resonator-Series Mode 4.7K 7404 7404 10K XTAL C1 Fig. 14 Circuit for Crystal/Resonator-Parallel Mode 27 EM78P156EL Frequency C1(pF) 455 kHz 100~150 2.0 MHz 20~40 4.0 MHz 10~30 32.768kHz 25 100KHz 25 200KHz 25 455KHz 20~40 1.0MHz 15~30 2 ...

Page 28

... This specification is subject to change without prior notice. OSCI EM78P156EL Fig. 15 Circuit for External RC Oscillator Mode Rext Average Fosc 5V,25°C Average Fosc 3V,25°C 3.3k 3.92 MHz 5.1k 2.67 MHz 10k 1.39MHz 100k 149 KHz 28 EM78P156EL OTP ROM Vcc Rext Cext 3.65 MHz 2.60 MHz 1.40 MHz 156 KHz 2002/04/19 ...

Page 29

... Measured on DIP packages. 2. For design reference only. 4.8 CODE Option Register The EM78P156EL has a CODE option word that is not a part of the normal program memory. The option bits cannot be accessed during normal program execution. Code Option Register and Customer ID Register arrangement distribution: ...

Page 30

... Power On Considerations Any microcontroller is not guaranteed to start to operate properly before the power supply stays at its steady state. EM78P156EL is equipped with Power On Voltage Detector (POVD) with a detecting level of 1.8V. It will work well if Vdd rise quick enough ( less). In many critical applications, however, extra devices are still required to assist in solving power-up problems ...

Page 31

... Fig.18 and Fig. 19 show how to build a residue-voltage protection circuit. EM78P156EL /RESET This specification is subject to change without prior notice. Vdd /RESET Rin Fig. 16 External Power-Up Reset Circuit Vdd Q1 40K Fig. 17 Circuit 1 for the Residue Voltage Protection 31 EM78P156EL Vdd 33K 10K 1N4684 OTP ROM 2002/04/19 ...

Page 32

... TCC should be CLK=Fosc/4, instead of Fosc indicated in Fig addition, the instruction set has the following features: (1) Every bit of any register can be set, cleared, or tested directly. This specification is subject to change without prior notice. Vdd Q1 40K Fig. 18 Circuit 2 for the Residue Voltage Protection 32 EM78P156EL OTP ROM Vdd R1 R2 2002/04/19 ...

Page 33

... RRCA R R(0) → → A(7) 06rr RRC R R(0) → → R(7) 06rr RLCA R R(7) → → A(0) 06rr RLC R 33 EM78P156EL OPERATION STATUS AFFECTED No Operation Decimal Adjust A A → CONT 0 → WDT A → IOCR None <Note1> Enable Interrupt Disable Interrupt Interrupt CONT → A IOCR → ...

Page 34

... OR A,k 1Akk AND A,k 1Bkk XOR A,k 1Ckk RETL k [Top of Stack] → PC 1Dkk SUB A,k 1E01 INT 1Fkk ADD A,k 34 EM78P156EL R(0-3) → A(4-7), R(4-7) → A(0-3) R(0-3) ↔ R(4-7) 0 → R(b) None <Note2> 1 → R(b) None <Note3> if R(b)=0, skip if R(b)=1, skip PC+1 → [SP], (Page, k) → PC (Page, k) → → ∨ k → & k → ⊕ ...

Page 35

... RESET Timing (CLK="0") CLK /RESET TCC Input Timing (CLKS="0") Tins CLK TCC This specification is subject to change without prior notice. 2.0 TEST POINTS 0.8 NOP Tdrh Ttcc 35 EM78P156EL OTP ROM 2.0 0.8 Instruction 1 Executed 2002/04/19 ...

Page 36

... ABSOLUTE MAXIMUNM RATINGS Items Temperature under bias Storage temperature Input voltage Output voltage This specification is subject to change without prior notice. Rating 0°C to 70°C -65°C to 150°C -0.3V to +6.0V -0.3V to +6.0V 36 EM78P156EL OTP ROM 2002/04/19 ...

Page 37

... WDT enabled /RESET= 'High', Fosc=4MHz (Crystal type, CLKS="0"), output pin floating, WDT enabled /RESET= 'High', Fosc=10MHz (Crystal type, CLKS="0"), output pin floating, WDT enabled 37 EM78P156EL OTP ROM Min Typ. Max Unit DC 8.0 MHz DC 20 ...

Page 38

... Output pin delay time * N= selected prescaler ratio. This specification is subject to change without prior notice. Conditions Min 45 Crystal type 100 RC type 500 (Tins+20)/N* 11 25°C 2000 Ta = 25° 25°C 11.8 Cload=20pF 38 EM78P156EL OTP ROM Typ Max Unit 16.8 21 16.8 21.8 ms ...

Page 39

... APPENDIX Package Types: OTP MCU EM78P156ELP EM78P156ELM EM78P156ELAS EM78P156ELKM This specification is subject to change without prior notice. Package Type Pin Count DIP SOP SSOP SSOP 39 EM78P156EL OTP ROM Package Size 18 300 mil 18 300 mil 20 209 mil 20 209 mil 2002/04/19 ...

Related keywords