74AHCT1G126GW,125 NXP Semiconductors, 74AHCT1G126GW,125 Datasheet - Page 2

• Manufacturer Part Number: 74AHCT1G126GW,125
• Description: IC BUFF/DVR 3-ST 1BIT 5TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr

Specifications of 74AHCT1G126GW,125

• Package / Case: SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: AHCT
• Number Of Channels Per Chip: 1
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 8 mA
• Low Level Output Current: 8 mA
• Maximum Power Dissipation: 250 mW
• Minimum Operating Temperature: - 40 C
• Output Current: 25 mA
• Output Type: 3-State
• Propagation Delay Time: 7.5 ns @ 4.5 V to 5.5 V
• Number Of Lines (input / Output): 1 / 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4829-2; 74AHCT1G126GW,125; 74AHCT1G126GW-G; 74AHCT1G126GW-G; 935263004125

NXP Semiconductors
4. Marking
Table 2.
[1]
5. Functional diagram
6. Pinning information
74AHC_AHCT1G126_7
Product data sheet
Type number
74AHC1G126GW
74AHCT1G126GW
74AHC1G126GV
74AHCT1G126GV
74AHC1G126GM
74AHCT1G126GM
74AHC1G126GF
74AHCT1G126GF
Fig 1. Logic symbol
Fig 4.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
GND
OE
A
2
1
Pin configuration
SOT353-1 and SOT753
Marking codes
1
2
3
A
OE
74AHCT1G126
74AHC1G126
6.1 Pinning
001aaf096
mna125
Y
5
4
4
V
Y
CC
Fig 2. IEC logic symbol
Fig 5.
GND
Rev. 07 — 17 June 2009
2
1
OE
Pin configuration SOT886
A
Transparent top view
74AHC1G126; 74AHCT1G126
74AHCT1G126
74AHC1G126
OE
1
2
3
Marking
AN
CN
A26
C26
AN
CN
AN
CN
mna126
001aak257
6
5
4
V
n.c.
Y
[1]
CC
4
Fig 3. Logic diagram
Fig 6.
OE
A
Bus buffer/line driver; 3-state
GND
OE
Pin configuration SOT891
A
Transparent top view
74AHCT1G126
74AHC1G126
1
2
3
© NXP B.V. 2009. All rights reserved.
001aak258
6
5
4
V
n.c.
Y
CC
mna127
2 of 16
Y