74LVC125ADB,118 NXP Semiconductors, 74LVC125ADB,118 Datasheet - Page 4

IC BUFF DVR TRI-ST QD 14SSOP

74LVC125ADB,118

Manufacturer Part Number
74LVC125ADB,118
Description
IC BUFF DVR TRI-ST QD 14SSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC125ADB,118

Logic Type
Buffer/Line Driver, Non-Inverting
Package / Case
14-SSOP
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74LVC
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Input Bias Current (max)
40 uA
Low Level Output Current
24 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8 / 4
Output Type
3-State
Propagation Delay Time
2.4 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2277-2
74LVC125ADB-T
935231710118
Philips Semiconductors
2003 May 07
handbook, halfpage
handbook, halfpage
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
2OE
Fig.2 Pin configuration DHVQFN14.
1A
1Y
2A
2Y
Fig.4 Logic symbol (IEEE/IEC).
Top view
2
3
4
5
6
10
12
13
1
4
2
5
9
GND
1OE
EN1
7
1
GND
MNA229
V CC
1
(1)
3Y
14
8
11
MCE181
3
6
8
13
12
11
10
9
4OE
4A
4Y
3OE
3A
4
handbook, halfpage
handbook, halfpage
nOE
nA
Fig.5 Logic diagram.
Fig.3 Logic symbol.
10
12
13
2
1
5
4
9
1OE
2OE
3OE
4OE
1A
2A
3A
4A
MNA228
1Y
2Y
3Y
4Y
11
Product specification
3
6
8
74LVC125A
MNA227
nY

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