HEF4050BT,653 NXP Semiconductors, HEF4050BT,653 Datasheet - Page 5

• Manufacturer Part Number: HEF4050BT,653
• Description: IC BUFFER HEX NON-INV 16SOICN
• Manufacturer: NXP Semiconductors
• Series: 4000Br

Specifications of HEF4050BT,653

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 6
• Number Of Bits Per Element: 1
• Current - Output High, Low: 3.4mA, 20mA
• Voltage - Supply: 3 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Logic Family: HEF4000
• Number Of Channels Per Chip: 6
• Polarity: Non-Inverting
• Supply Voltage (max): 15 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 3.6 mA
• Low Level Output Current: 24 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 6 / 6
• Propagation Delay Time: 110 ns at 5 V, 55 ns at 10 V, 40 ns at 15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 933372930653; HEF4050BTD-T; HEF4050BTD-T

NXP Semiconductors
11. Dynamic characteristics
Table 7.
V
[1]
Table 8.
P
HEF4050B_7
Product data sheet
Symbol
t
t
t
t
Symbol
P
PHL
PLH
THL
TLH
SS
D
D
can be calculated from the formulas shown. V
= 0 V; T
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
Parameter
HIGH to LOW
propagation delay
LOW to HIGH
propagation delay
HIGH to LOW
output transition time
LOW to HIGH
output transition time
Dynamic characteristics
Dynamic power dissipation P
Parameter
dynamic power
dissipation
amb
= 25
°
C; for test circuit see
V
10 V
15 V
5 V
DD
Conditions
nA to nY;
see
nA to nY;
see
see
see
Figure 5
Figure 5
Figure 5
Figure 5
Typical formula for P
P
P
P
Figure
D
D
D
D
= 3800 × f
= 11600 × f
= 65900 × f
SS
Rev. 07 — 1 December 2009
6; unless otherwise specified.
V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
= 0 V; t
5 V
5 V
5 V
5 V
DD
i
+ Σ(f
i
i
+ Σ(f
+ Σ(f
r
[1]
[1]
[1]
[1]
= t
o
f
o
o
× C
Extrapolation formula
26 ns + (0.18 ns/pF)C
16 ns + (0.08 ns/pF)C
12 ns + (0.05 ns/pF)C
28 ns + (0.55 ns/pF)C
14 ns + (0.23 ns/pF)C
12 ns + (0.16 ns/pF)C
10 ns + (1.00 ns/pF)C
≤
× C
7 ns + (0.35 ns/pF)C
3 ns + (0.14 ns/pF)C
2 ns + (0.09 ns/pF)C
9 ns + (0.42 ns/pF)C
6 ns + (0.28 ns/pF)C
× C
D
20 ns; T
(μW)
L
) × V
L
L
) × V
) × V
DD
amb
DD
DD
2
2
2
= 25
°
C.
where:
f
f
C
V
Σ(f
L
L
L
L
L
L
L
L
L
L
L
L
i
o
DD
= input frequency in MHz,
L
= output frequency in MHz,
o
= output load capacitance in pF,
× C
= supply voltage in V,
L
Min
-
-
-
-
-
-
-
-
-
-
-
-
Hex non-inverting buffers
) = sum of the outputs.
HEF4050B
Typ
35
20
15
55
25
20
25
10
60
30
20
7
© NXP B.V. 2009. All rights reserved.
Max
110
120
70
35
30
55
40
50
20
14
60
40
L
in pF).
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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