74AUP1G125GW,125 NXP Semiconductors, 74AUP1G125GW,125 Datasheet - Page 18

IC BUFF DVR TRI-ST L PWR 5TSSOP

74AUP1G125GW,125

Manufacturer Part Number
74AUP1G125GW,125
Description
IC BUFF DVR TRI-ST L PWR 5TSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheets

Specifications of 74AUP1G125GW,125

Logic Type
Buffer/Line Driver, Non-Inverting
Package / Case
*
Number Of Elements
1
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74AUP
Number Of Channels Per Chip
1
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
2 / 1
Output Type
3-State
Propagation Delay Time
19.8 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2555-2
935279054125
NXP Semiconductors
Fig 15. Package outline SOT902-1 (XQFN8U)
74AUP2G125
Product data sheet
XQFN8U: plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
SOT902-1
VERSION
OUTLINE
not for soldering
metal area
max
0.5
A
terminal 1
index area
terminal 1
index area
0.05
0.00
A
L
1
1
3
2
1
0.25
0.15
b
IEC
- - -
L
1.65
1.55
D
e
1.65
1.55
E
4
8
D
0.55
MO-255
JEDEC
e
0
All information provided in this document is subject to legal disclaimers.
e
REFERENCES
0.5
e
1
Rev. 7 — 21 September 2010
0.35
0.25
L
5
6
7
B
b
0.15
0.05
JEITA
L
- - -
1
e
e
A
E
scale
1
1
1
∅ v
∅ w
0.1
v
M
M
C
C
0.05
w
A
B
Low-power dual buffer/line driver; 3-state
0.05
y
A
2 mm
0.05
y
A
y
1
1
1
C
PROJECTION
EUROPEAN
detail X
74AUP2G125
X
C
© NXP B.V. 2010. All rights reserved.
y
ISSUE DATE
05-11-25
07-11-14
SOT902-1
18 of 24

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