74AHC2G126DC,125 NXP Semiconductors, 74AHC2G126DC,125 Datasheet - Page 9

• Manufacturer Part Number: 74AHC2G126DC,125
• Description: IC BUFF DVR TRI-ST DL 8VSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCr

Specifications of 74AHC2G126DC,125

• Package / Case: US8, 8-VSSOP
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: AHC
• Number Of Channels Per Chip: 2
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 8 mA
• Input Bias Current (max): 1 uA
• Low Level Output Current: 8 mA
• Minimum Operating Temperature: - 40 C
• Output Type: 3-State
• Propagation Delay Time: 11.5 ns @ 3 V to 3.6 V or 7.5 ns @ 4.5 V to 5.5 V
• Number Of Lines (input / Output): 2 / 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AHC2G126DC-G; 74AHC2G126DC-G; 935275134125

NXP Semiconductors
Table 10.
74AHC_AHCT2G126
Product data sheet
Type
74AHC2G126
74AHCT2G126
Fig 8.
Test data is given in
Definitions test circuit:
R
R
S1 = Test selection switch.
Test circuit for measuring switching times
C
T
L
L
Test data
= Load capacitance including jig and probe capacitance.
= Load resistance.
= Termination resistance should be equal to output impedance Z
Input
V
V
3 V
I
CC
Table
negative
positive
t
 3 ns
 3 ns
10.
r
, t
pulse
pulse
0 V
0 V
f
V
V
G
I
I
90 %
10 %
All information provided in this document is subject to legal disclaimers.
V I
Load
C
15 pF, 50 pF
15 pF, 50 pF
L
t
t
f
r
V
V
Rev. 5 — 24 March 2011
M
M
R T
10 %
90 %
74AHC2G126; 74AHCT2G126
DUT
V
CC
t
t
W
W
R
1 k
1 k
L
V O
o
of the pulse generator.
S1 position
t
open
open
V
V
PHL
M
M
C L
t
t
r
f
, t
R L
PLH
S1
001aad983
V
CC
open
Dual buffer/line driver; 3-state
t
GND
GND
PZH
, t
PHZ
© NXP B.V. 2011. All rights reserved.
t
V
V
PZL
CC
CC
, t
PLZ
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