74LVC3G17DP,125 NXP Semiconductors, 74LVC3G17DP,125 Datasheet - Page 19

IC BUFF SCHMT TRG TRPL 8TSSOP

74LVC3G17DP,125

Manufacturer Part Number
74LVC3G17DP,125
Description
IC BUFF SCHMT TRG TRPL 8TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC3G17DP,125

Logic Type
Schmitt Trigger - Buffer, Driver
Package / Case
8-TSSOP
Number Of Elements
3
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74LVC
Number Of Channels Per Chip
3
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
-40 C
Propagation Delay Time
5.4 ns
Number Of Lines (input / Output)
3 / 3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC3G17DP-G
74LVC3G17DP-G
935275564125
NXP Semiconductors
Fig 21. Package outline SOT1203 (XSON8)
74LVC3G17
Product data sheet
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1203
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
terminal 1
index area
0.20
0.15
0.12
e
b
(8×)
IEC
L
(2)
1.40
1.35
1.30
1
D
1.05
1.00
0.95
E
1
8
0.55 0.35
e
JEDEC
e
1
All information provided in this document is subject to legal disclaimers.
2
7
e
1
References
e
D
1
Rev. 7 — 4 November 2010
0.35
0.30
0.27
0
L
3
6
Triple non-inverting Schmitt trigger with 5 V tolerant input
0.40
0.35
0.32
e
L
1
1
JEITA
b
4
5
scale
0.5
A
E
L
1
A
1 mm
(4×)
(2)
European
projection
74LVC3G17
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-06
sot1203_po
SOT1203
19 of 23

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