74HC3G07DP,125 NXP Semiconductors, 74HC3G07DP,125 Datasheet - Page 6

IC BUFFER OP/DRAIN N-INV 8TSSOP

74HC3G07DP,125

Manufacturer Part Number
74HC3G07DP,125
Description
IC BUFFER OP/DRAIN N-INV 8TSSOP
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC3G07DP,125

Logic Type
Buffer/Line Driver, Non-Inverting with Open Drain
Number Of Elements
3
Number Of Bits Per Element
1
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Logic Family
HC
Number Of Channels Per Chip
3
Polarity
Non-Inverting
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Low Level Output Current
5.2 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
3 / 3
Output Type
Open Drain
Propagation Delay Time
25 ns at 2 V, 9 ns at 4.5 V, 7 ns at 6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC3G07DP-G
74HC3G07DP-G
935272999125
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); all typical values are measured at T
[1]
12. Waveforms
Table 9.
74HC_HCT3G07_2
Product data sheet
Symbol Parameter
74HCT3G07
t
t
t
C
Type
74HC3G07
74HCT3G07
PZL
PLZ
THL
Fig 6. The input (nA) to output (nY) propagation delays
PD
C
P
f
f
C
V
N = number of inputs switching;
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
OFF-state to LOW
propagation delay
LOW to OFF-state
propagation delay
HIGH to LOW output
transition time
power dissipation
capacitance
Measurement points are given in
V
PD
V
OL
Dynamic characteristics
Measurement points
CC
2
is the typical output voltage level that occurs with the output load.
V
CC
f
o
2
) = sum of outputs.
f
i
N + (C
nY output
nA input
Input
V
0.5
1.3 V
L
Conditions
nA to nY; see
nA to nY; see
V
V
M
CC
I
V
V
V
= GND to V
CC
CC
CC
V
= 4.5 V; see
GND
2
…continued
V
CC
V
= 4.5 V
= 4.5 V
CC
OL
Table
V
f
I
o
) where:
9.
Figure 6
Figure 6
CC
V
Figure 6
M
Rev. 02 — 12 May 2009
t
1.5 V
PLZ
D
in W).
V
X
[1]
Output
V
0.5
1.3 V
M
Min
-
-
-
-
74HC3G07; 74HCT3G07
V
CC
40 C to +85 C
Typ
11
10
6
4
t
PZL
Triple buffer with open-drain outputs
amb
V
M
Max
t
27
26
19
THL
001aak034
= 25 C; for test circuit see
V
0.1
0.1
X
Min
40 C to +125 C
-
-
-
-
V
V
CC
CC
© NXP B.V. 2009. All rights reserved.
Max
32
31
22
-
Figure
Unit
ns
ns
ns
pF
6 of 13
7.

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