74AUP1T45GW,125 NXP Semiconductors, 74AUP1T45GW,125 Datasheet
74AUP1T45GW,125
Specifications of 74AUP1T45GW,125
74AUP1T45GW-G
935280513125
Related parts for 74AUP1T45GW,125
74AUP1T45GW,125 Summary of contents
Page 1
Low-power dual supply translating transceiver; 3-state Rev. 3 — 4 November 2010 1. General description The 74AUP1T45 is a single bit transceiver featuring two data input-outputs (A and B), a direction control input (DIR) and dual supply pins (V ...
Page 2
... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74AUP1T45GW −40 °C to +125 °C 74AUP1T45GM −40 °C to +125 °C 74AUP1T45GF −40 °C to +125 °C 74AUP1T45GN −40 °C to +125 °C 74AUP1T45GS 4. Marking Table 2. Marking ...
Page 3
... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP1T45 CC(A) CC(B) GND 2 5 DIR 001aae964 Fig 3. Pin configuration SOT363 6.2 Pin description Table 3. Pin description Symbol Pin V 1 CC(A) GND DIR CC(B) 7. Functional description [1] Table 4. Function table Supply voltage Input DIR CC(A) CC(B) 1 ...
Page 4
... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage A CC(A) V supply voltage B CC(B) I input clamping current IK V input voltage I I output clamping current OK V output voltage ...
Page 5
... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions = 25 °C T amb V HIGH-level input data input IH voltage DIR input LOW-level input data input IL voltage DIR input HIGH-level output voltage LOW-level output voltage ...
Page 6
... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I OFF-state output port current V CC(A) I power-off A port; V OFF leakage current V CC(A) B port CC(B) DIR input CC(A) ΔI additional A port; V OFF power-off V CC(A) leakage current B port ...
Page 7
... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions = −40 °C to +85 °C T amb V HIGH-level input data input IH voltage DIR input LOW-level input data input IL voltage DIR input HIGH-level output voltage LOW-level output voltage ...
Page 8
... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I power-off A port; V OFF leakage current V CC(A) B port CC(B) DIR input CC(A) ΔI additional A port; V OFF power-off V CC(A) leakage current B port CC(B) DIR input CC(A) ...
Page 9
... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level input data input IL voltage DIR input HIGH-level output voltage LOW-level output voltage input leakage DIR input current V CC(A) I OFF-state output port current V CC(A) ...
Page 10
... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions ΔI additional A port; V OFF power-off V CC(A) leakage current B port CC(B) DIR input CC(A) I supply current A port port plus B port ( GND CC(A) ΔI additional supply A port ...
Page 11
... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see 74AUP1T45 Product data sheet Low-power dual supply translating transceiver ...
Page 12
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 13
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 14
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 15
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 16
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 17
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 18
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 19
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 20
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see CC(A) t propagation delay see disable time DIR to A; see dis DIR to B; see ...
Page 21
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time DIR to A; see dis DIR to B; see 74AUP1T45 Product data sheet Low-power dual supply translating transceiver; 3-state …continued Figure [3] Figure 1.3 V CC( ...
Page 22
... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions pF and power dissipation A port; (direction capacitance port; (direction port; (direction port; (direction [1] All typical values are measured at nominal V [ the same as t and t ...
Page 23
... NXP Semiconductors 12. Waveforms Measurement points are given in V and V are typical output voltage drops that occur with the output load Fig 6. The data input ( output (B, A) propagation delay times DIR input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in ...
Page 24
... NXP Semiconductors Test data is given in Table R = Load resistance Load capacitance including jig and probe capacitance Termination resistance External voltage for measuring switching times. EXT Fig 8. Test circuit for measuring switching times Table 10. Test data Supply voltage Input [ CC(A) CC(B) I ≤ 3 ...
Page 25
... NXP Semiconductors 13. Application information 13.1 Unidirectional logic level-shifting application The circuit given in unidirectional logic level-shifting application. Fig 9. Table 11. Pin 74AUP1T45 Product data sheet Low-power dual supply translating transceiver; 3-state Figure example of the 74AUP1T45 being used CC1 CC1 V CC(A) 1 GND System-1 Unidirectional logic level-shifting application ...
Page 26
... NXP Semiconductors 13.2 Bidirectional logic level-shifting application Figure 10 application. Since the device does not have an output enable (OE) pin, the system designer should take precautions to avoid bus contention between system-1 and system-2 when changing directions. V CC1 PULL-UP/DOWN OR I/O-1 BUSHOLD DIR CTRL System-1 System-1 and system-2 must use the same conditions, i ...
Page 27
... NXP Semiconductors 13.3 Power-up considerations A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies. Take the following precautions to guard against such power-up problems: • Connect ground before any supply voltage is applied. • Power-up V • V CC(B) 13 ...
Page 28
... NXP Semiconductors 14. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.30 0.25 mm 0.1 0.8 0.20 0.10 OUTLINE VERSION IEC SOT363 Fig 11. Package outline SOT363 (SC-88) 74AUP1T45 Product data sheet Low-power dual supply translating transceiver; 3-state ...
Page 29
... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...
Page 30
... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 13 ...
Page 31
... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
Page 32
... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
Page 33
... NXP Semiconductors 15. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 16. Revision history Table 14. Revision history Document ID Release date 74AUP1T45 v.3 20101104 • Modifications: Added type number 74AUP1T45GN (SOT1115/XSON6 package). ...
Page 34
... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
Page 35
... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 18. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AUP1T45 Product data sheet Low-power dual supply translating transceiver ...
Page 36
... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 11 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 13 Application information ...