74LVT646DB,112 NXP Semiconductors, 74LVT646DB,112 Datasheet - Page 2

• Manufacturer Part Number: 74LVT646DB,112
• Description: IC TRANSCVR 8BIT N-INV 24SSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVTr

Specifications of 74LVT646DB,112

• Logic Type: Transceiver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LVT646DB; 74LVT646DB; 935167210112

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
24-Pin Plastic SOL
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
1998 Feb 19
Combines 74LVT245 and 74LVT574 type functions in one device
Independent registers for A and B buses
Multiplexed real–time and stored data
Output capability: +64mA/–32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
Power-up 3-State
Power-up reset
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
3.3V Octal bus transceiver/register (3-State)
SYMBOL
t
t
I
C
C
CCZ
PLH
PHL
I/O
IN
PACKAGES
CPAB
GND
SAB
DIR
A0
A1
A2
A3
A4
A5
A6
A7
Propagation delay
An to Bn or Bn to An
Input capacitance
CP, S, OE, DIR
I/O capacitance
Total supply current
10
12
11
1
2
3
4
5
6
7
8
9
SV00045
PARAMETER
TEMPERATURE RANGE
24
23
22
21
20
19
18
17
16
15
14
13
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
V
CPBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
OUTSIDE NORTH AMERICA
C
V
Outputs disabled; V
Outputs disabled; V
2
L
I/O
= 50pF; V
DESCRIPTION
The LVT646 is a high-performance BiCMOS product designed for
V
This device consists of bus transceiver circuits with 3-State outputs,
D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or the internal
registers.
Data on the A or B bus will be clocked into the registers as the
appropriate clock pin goes High.
Output Enable (OE) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE is active (Low).
In the isolation mode (OE = High), data from Bus A may be stored in
the B register and/or data from Bus B may be stored in the A
register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B may be driven at a time. The examples on the
next page demonstrate the four fundamental bus management
functions that can be performed with the 74LVT646.
= 0V or 3.0V
PIN DESCRIPTION
74LVT646 PW
74LVT646 DB
74LVT646 D
CC
4, 5, 6, 7, 8, 9, 10,
20, 19, 18, 17, 16,
T
PIN NUMBER
amb
operation at 3.3V.
15, 14, 13
1, 23
2, 22
CONDITIONS
CC
= 25 C; GND = 0V
21
12
24
11
3
= 3.3V
I/O
CC
= 0V or 3.0V
= 3.6V
SAB / SBA
SYMBOL
A0 – A7
B0 – B7
NORTH AMERICA
CPAB /
CPBA
74LVT646PW DH
GND
DIR
V
OE
74LVT646 DB
CC
74LVT646 D
A to B clock input / B to A
clock input
A to B select input / B to
A select input
Direction control input
Data inputs/outputs (A
side)
Data inputs/outputs (B
side)
Output enable input
(active-low)
Ground (0V)
Positive supply voltage
TYPICAL
0.13
2.8
2.7
10
Product specification
4
74LVT646
FUNCTION
DWG NUMBER
853-1747 18987
SOT163-1
SOT399-1
SOT360-1
UNIT
mA
pF
pF
ns