74ABT657D,623 NXP Semiconductors, 74ABT657D,623 Datasheet - Page 8

• Manufacturer Part Number: 74ABT657D,623
• Description: IC TRANSCVR TRI-ST 8BIT 24SOIC
• Manufacturer: NXP Semiconductors
• Series: 74ABTr

Specifications of 74ABT657D,623

• Logic Type: Transceiver, Non-Inverting
• Package / Case: 24-SOIC (7.5mm Width)
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: ABT
• Number Of Channels Per Chip: 8
• Input Level: TTL
• Output Level: TTL
• Output Type: 3-State
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Propagation Delay Time: 4.1 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 85 C
• Function: Bus Transceiver with Parity Checker
• Input Bias Current (max): 30000 uA
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Polarity: Non-Inverting
• Number Of Circuits: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74ABT657D-T; 74ABT657D-T; 935045290623

NXP Semiconductors
10. Dynamic characteristics
Table 7.
GND = 0 V; for test circuit, see
[1]
74ABT657_3
Product data sheet
Symbol Parameter
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
These delay times reflect the 3-state recovery time only and do not include the delay through the buffers and the parity check circuitry
which affect the ERROR output. To ensure valid information at the ERROR pin, time must be allowed for the signal to propagate
through the drivers (B to A), through the parity check circuitry (same as A to PARITY), and to the ERROR output. Valid data at the
ERROR pin
LOW to HIGH
propagation delay
HIGH to LOW
propagation delay
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
Dynamic characteristics
(B to A) + (A to PARITY).
Figure
Conditions
An to Bn or Bn to An; see
An to PARITY; see
ODD/EVEN to PARITY and ERROR;
see
Bn to ERROR; see
PARITY to ERROR; see
An to Bn or Bn to An; see
An to PARITY; see
ODD/EVEN to PARITY and ERROR;
see
Bn to ERROR; see
PARITY to ERROR; see
see
see
see
see
Figure 5
Figure 5
Figure 7
Figure 7
Figure 7
Figure 7
9.
All information provided in this document is subject to legal disclaimers.
and
and
and
and
and
and
6
6
8
8
8
8
Rev. 03 — 15 March 2010
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
Figure 6
Figure 6
Octal transceiver with parity generator/checker; 3-state
and
and
and
and
6
6
6
6
and
and
6
6
[1]
[1]
25 C; V
Min
1.1
2.5
1.7
3.9
2.7
1.2
2.8
1.9
4.0
3.2
1.3
1.9
2.4
2.2
Typ
2.5
5.1
3.5
7.3
4.5
3.0
5.0
3.7
7.9
5.2
3.6
4.2
3.6
3.4
CC
= 5.0 V
Max
10.2
10.5
4.1
6.7
4.6
5.9
3.9
7.4
5.1
6.7
5.5
5.3
5.6
7.3
V
CC
40 C to +85 C;
74ABT657
Min
1.1
2.5
1.7
3.9
2.7
1.2
2.8
1.9
4.0
3.2
1.3
1.9
2.4
2.2
= 5.0 V
© NXP B.V. 2010. All rights reserved.
Max
12.3
12.9
4.6
8.1
5.3
7.7
4.3
8.9
5.8
8.1
6.5
6.5
6.2
7.8
0.5 V
8 of 17
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns