74LVCH16244AEV,518 NXP Semiconductors, 74LVCH16244AEV,518 Datasheet - Page 10
![IC BUFF DVR TRI-ST 16BIT 56VFBGA](/photos/7/6/70616/56-vfbga_sot702-1_pkg_sml.jpg)
74LVCH16244AEV,518
Manufacturer Part Number
74LVCH16244AEV,518
Description
IC BUFF DVR TRI-ST 16BIT 56VFBGA
Manufacturer
NXP Semiconductors
Series
74LVCHr
Datasheet
1.74LVCH16244ADGG51.pdf
(19 pages)
Specifications of 74LVCH16244AEV,518
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
56-VFBGA
Logic Family
LVC
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
16 / 16
Output Type
3-State
Propagation Delay Time
11 ns at 1.2 V, 3 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVCH16244AEV/G-T
74LVCH16244AEV/G-T
935281129518
74LVCH16244AEV/G-T
935281129518
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LVCH16244AEV,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 8.
74LVC_LVCH16244A_9
Product data sheet
Supply voltage
V
1.2 V
2.7 V
3.0 V to 3.6 V
Fig 8.
CC
Measurement points are given in
Logic levels: V
3-state enable and disable times.
Measurement points
Input
V
V
2.7 V
2.7 V
I
CC
OL
and V
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
OFF-to-LOW
OH
nOE input
output
output
are typical output voltage levels that occur with the output load.
V
0.5 × V
1.5 V
1.5 V
GND
GND
V
V
V
M
Table
OH
CC
OL
V
All information provided in this document is subject to legal disclaimers.
I
8.
CC
Rev. 09 — 18 March 2010
V
M
enabled
74LVC16244A; 74LVCH16244A
outputs
t
PLZ
t
PHZ
Output
V
0.5 × V
1.5 V
1.5 V
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
M
V
X
V
CC
Y
disabled
outputs
t
PZL
t
V
V
V
V
PZH
X
OL
OL
OL
+ 0.1 V
+ 0.3 V
+ 0.3 V
V
M
V
M
outputs
enabled
mna362
V
V
V
V
Y
OH
OH
OH
© NXP B.V. 2010. All rights reserved.
− 0.1 V
− 0.3 V
− 0.3 V
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