M25P40 Numonyx, B.V., M25P40 Datasheet - Page 50

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M25P40

Manufacturer Part Number
M25P40
Description
4 Mbit, low voltage, serial Flash memory with 50 MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet

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Revision history
13
50/53
Revision history
Table 25.
25-May-2001
11-Sep-2001
12-Sep-2002
13-Dec-2002
24-Nov-2003
12-Mar-2004
05-Aug-2004
01-Aug-2005
12-Apr-2001
16-Jan-2002
12-Jun-2003
03-Jan-2005
Date
Document revision history
Revision
1.0
1.1
1.2
1.3
1.4
1.5
1.6
2.0
3.0
4.0
5.0
6.0
Document written.
Serial Paged Flash Memory renamed as Serial Flash Memory.
Changes to text: Signal Description/Chip Select; Hold Condition/1st para;
Protection modes; Release from Power-down and Read Electronic
Signature (RES); Power-up.
Repositioning of several tables and illustrations without changing their
contents.
Power-up timing illustration; SO8W package removed.
Changes to tables: Abs Max Ratings/V
FAST_READ instruction added. Document revised with new timings, V
I
Programming, Release for Deep Power-down made more precise. Value
of t
Clarification of descriptions of entering Standby Power mode from Deep
Power-down mode, and of terminating an instruction sequence or data-
out sequence.
VFQFPN8 package (MLP8) added. Document promoted to Preliminary
Data.
Typical Page Program time improved. Deep Power-down current
changed. Write Protect setup and hold times specified, for applications
that switch Write Protect to exit the Hardware Protection mode
immediately before a WRSR, and to enter the Hardware Protection mode
again immediately after.
Document promoted from Preliminary Data to full Datasheet.
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
40 MHz AC Characteristics table included as well as 25 MHz. I
t
package.
Automotive range added. Soldering temperature information clarified for
RoHS compliant devices.
Device grade information clarified. Data-retention measurement
temperature corrected. Details of how to find the date of marking added.
Small text changes. Notes 2 and 3 removed from
information
End timing line of t
Updated Page Program (PP) instructions in
Program
(device grade
CC3
SE
(typ) and t
W
(max) modified.
and clock slew rate. Descriptions of Polling, Hold Condition, Page
(PP),
scheme.
BE
3).
Instruction times (device grade 6)
(typ) values improved. Change of naming for VDFPN8
SHQZ
modified in
Changes
Figure 25: Output
IO
; DC Characteristics/V
Page
and
Table 24: Ordering
Programming,
Instruction times
timing.
CC3
IL
.
Page
M25P40
(max),
WI
,

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