MSC8113 Freescale Semiconductor / Motorola, MSC8113 Datasheet - Page 17
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MSC8113
Manufacturer Part Number
MSC8113
Description
Tri-Core Digital Signal Processor
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.MSC8113.pdf
(44 pages)
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2.5.3
The following sections include a description of clock signal characteristics. Table 7 shows the maximum frequency values for
internal (Core, Reference, Bus, and DSI) and external (
frequency values are not exceeded.
Freescale Semiconductor
Core frequency
Reference frequency (REFCLK)
Internal bus frequency (BLCK)
DSI clock frequency (HCLKIN)
•
•
External clock frequency (CLKIN or CLKOUT)
CLKIN frequency
BCLK frequency
Reference clock (REFCLK) frequency
Output clock (CLKOUT) frequency
SC140 core clock frequency
Note:
Phase jitter between BCLK and CLKIN
CLKIN frequency
CLKIN slope
PLL input clock (after predivider)
Core frequency = 300 MHz
Core frequency = 400 MHz
The rise and fall time of external clocks should be 3 ns maximum
PORESET/TRST asserted
Figure 7. Start-Up Sequence: V
Clock and Timing Signals
Characteristics
Characteristic
V
DD
o.5 V
1.1 V
3.3 V
Characteristic
applied
MSC8113 Tri-Core Digital Signal Processor Data Sheet, Rev. 0
Table 9. System Clock Parameters
Table 7. Maximum Frequencies
Table 8. Clock Frequencies
V
DDH
CLKIN starts toggling
DD
applied
Raised Before V
Symbol
F
F
CLKIN
F
F
F
CLKOUT
REFCLK
CLKIN
CORE
BCLK
and
CLKOUT
V
V
DDH
DD
1
Min
200
DDH
20
40
40
40
300 MHz Device
= Nominal
HCLKIN ≤ (min{100 MHz, CLKOUT})
HCLKIN ≤ (min{70 MHz, CLKOUT})
= Nominal
) clocks. The user must ensure that maximum
with CLKIN Started with V
Min
PORESET/TRST deasserted
—
20
—
20
Maximum in MHz
300/400
100/133
100/133
100/133
Max
100
100
100
100
300
V
V
see Table 8
DD
DDH
Max
100
Nominal
0.3
Time
3
Nominal
Electrical Characteristics
Min
200
20
40
40
40
400 MHz Device
DDH
Unit
MHz
MHz
ns
ns
133.3
133.3
133.3
133.3
Max
400
17