MSC8126 Freescale Semiconductor / Motorola, MSC8126 Datasheet - Page 27

• Manufacturer Part Number: MSC8126
• Description: Quad Digital Signal Processor
• Manufacturer: Freescale Semiconductor / Motorola

2.5.5.3
Table 17 describes the DMA signal timing.
The DREQ
according to the timings in Table 17. Figure 13 shows synchronous peripheral interaction.
Freescale Semiconductor
No.
37
38
39
40
41
DREQ set-up time before the 50% level of the falling edge of REFCLK
DREQ hold time after the 50% level of the falling edge of REFCLK
DONE set-up time before the 50% level of the rising edge of REFCLK
DONE hold time after the 50% level of the rising edge of REFCLK
DACK/DRACK/DONE delay after the 50% level of the REFCLK rising edge
signal is synchronized with
DMA Data Transfers
DACK/DONE/DRACK
MSC8126 Quad Digital Signal Processor Data Sheet, Rev. 13
Characteristic
REFCLK
REFCLK
DONE
DREQ
. To achieve fast response, a synchronized peripheral should assert
Figure 13. DMA Signals
Table 17. DMA Signals
39
41
37
40
Ref = CLKIN
Min
5.0
0.5
5.0
0.5
0.5
Max
7.5
38
—
—
—
—
Electrical Characteristics
Ref = CLKOUT
Min
(1.2 V only)
5.0
0.5
5.0
0.5
0.5
Max
8.4
—
—
—
—
DREQ
Units
ns
ns
ns
ns
ns
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