CC2400 Chipcon AS, CC2400 Datasheet - Page 10

• Manufacturer Part Number: CC2400
• Description: 2.4 GHz RF Transceiver
• Manufacturer: Chipcon AS

Chipcon AS
Crystal ESR
Crystal oscillator start-up time
Phase noise
PLL loop bandwidth
PLL lock time (RX / TX turn-on
time)
PLL turn-on time from IDLE mode,
crystal oscillator on
Digital Inputs/Outputs
Logic "0" input voltage
Logic "1" input voltage
Logic "0" output voltage
Logic "1" output voltage
Logic "0" input current
Logic "1" input current
DIO setup time
DIO hold time
Serial interface (SCLK, SI, SO and
CSn) timing specification
Power Supply
Recommended operating voltage
RF and analogue
Digital core
Digital I/O
Supply voltage, operating limits
RF and analogue
Digital core
Digital I/O
Parameter
SmartRF
®
CC2400 PRELIMINARY Datasheet (rev. 1.1), 2003-10-02
DVDD
Min.
0.7*
2.5
NA
NA
1.6
1.6
1.6
20
10
0
0
1.8/3.3
Typ.
- 117
−109
−117
−117
0.86
100
130
1.8
1.8
50
SmartRF
Max.
DVDD
DVDD
DVDD
0.3*
0.4
2.0
2.0
3.6
60
−1
1
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Unit
kHz
ms
µA
µA
µs
µs
ns
ns
Ω
V
V
V
V
V
V
V
V
V
V
TX un-buffered mode, minimum
Condition / Note
16 pF load
Unmodulated carrier
At ±1 MHz offset from carrier
At ±2 MHz offset from carrier
At ±3 MHz offset from carrier
At ±5 MHz offset from carrier
Until within ± 10 kHz
Step size is 1MHz, no calibration.
Crystal oscillator running.
Calibration time included.
Signal levels are referred to the
voltage level at the pin DVDD3.3.
Output current −8 mA,
3.3 V supply voltage
Output current 8 mA,
3.3 V supply voltage
Input signal equals GND
Input signal equals DVDD
time DIO must be ready before
the positive edge of DCLK
TX un-buffered mode, minimum
time DIO must be held after the
positive edge of DCLK
See Table 3 page 21
The digital I/O voltage (DVDD3.3
pin) must match the interfacing
circuit.
®
CC2400
Page 10 of 73