STE2004DIE1 STMicroelectronics, STE2004DIE1 Datasheet - Page 29

• Manufacturer Part Number: STE2004DIE1
• Description: 102 x 65 SINGLE CHIP LCD CONTROLLER / DRIVER
• Manufacturer: STMicroelectronics

the eighth SCLK clock pulse during every byte transfer.
If CS stays low after the last bit of a command/data byte, the serial interface expects the MSB of the next byte
at the next SCLK positive edge.
A reset pulse on RES pin interrupts the transmission. No data is written into the data RAM and all the internal
registers are cleared.
If CS is low after the positive edge of RES, the serial interface is ready to receive data.
Throughout SDOUT can be read the driver I
allows to read I
steady state and during data write.
It is possible to short circuit SDOUT and SDIN and read I2C address or status Byte without any additional lines.
Figure 34. 4-lines serial bus protocol - one byte transmission
Figure 35. 4-lines serial bus protocol - several byte transmission
Figure 36. 4-lines serial bus protocol - I2C Address or Status Byte Read
SCLK
SDIN
D/C
CS
SCLK
SDIN
SDOUT
SCLK
SDIN
D/C
D/C
CS
CS
DB7
2
C slave address or Status byte is reported in Fig. 34 & 35. SDOUT is in High impedance in
DB6
DB7
MSB
DB5
DB6
DB4
DB5
Command Write
DB3
DB4
High-Z
High-Z
DB3
DB2
DB2
DB1
2
C slave address or the status byte. The Command sequence that
DB1
DB0
DB0
DB7
DB7
DB7
Don't
Care
DB6
DB6
DB6
Don't
Care
Don't
DB5
DB5
Care
DB5
STATUS BYTE
ID Number
DATA Read
DB4
DB4
Don't
Care
DB4
DB3
DB3
Don't
Care
DB3
DB2
DB2
Don't
Care
DB2
DB1
DB1
Don't
Care
DB1
DB0
DB0
Don't
Care
LSB
DB0
High-Z
High-Z
LR00076
DB7
LR0071
STE2004
DB6
LR0072
DB5
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