STE2004S STMicroelectronics, STE2004S Datasheet - Page 34
STE2004S
Manufacturer Part Number
STE2004S
Description
102 x 65 Single Chip Lcd Controller / Driver
Manufacturer
STMicroelectronics
Datasheet
1.STE2004S.pdf
(66 pages)
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STE2004S
4.3 Parallel Interface
The STE2004S selectable parallel Interfaces are 68000-series and 8080-series. They are both an 8-bits
bi-directional link between the display driver and the application supervisor.
Throughout both parallel interfaces can be read the I
4.3.1 68000-series parallel interface
If CS is low after the positive edge of RES, the 68000 parallel interface is ready to receive or transmit data.
While CS pin is high the 68000 Parallel interface is kept in reset.
4.3.1.1 Write Mode
If R/W line is set to 0 Data are latched on E falling edge.
4.3.1.2 Read Mode
When R/W line is set to 1, data are output on D0-D7 bus on E rising edge. Data Bus is set in high imped-
ance mode when E is set to logic 0.
Accordingly to R bit value I2C Address or Status Byte is output on D0-D7 bus.
Figure 45. 68000-series Parallel interface protocol - one byte transmission
Figure 46. 68000-series Parallel interface bus protocol - Several bytes transmission
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R/W
D/C
CS
D0
D7
E
to
R/W
D/C
CS
D0
D7
E
to
2
C driver slave address or the Status Byte.
LR0004
LR0081
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