STE2004S STMicroelectronics, STE2004S Datasheet - Page 60
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STE2004S
Manufacturer Part Number
STE2004S
Description
102 x 65 Single Chip Lcd Controller / Driver
Manufacturer
STMicroelectronics
Datasheet
1.STE2004S.pdf
(66 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
STE2004S
60/66
AC OPERATION
(VDD1 = 1.7 to 3.6 V; VDD2 = 1.75 to 4.5 V; Vss1,2 = 0V; VLCD = 4.5 to 15 V; Tamb =-40 to 85°C; unless otherwise specified)
Figure 75. Serial interface Timing
Notes: 1.
SERIAL INTERFACE
F
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
SCLK
CYC
PWH1
PWL1
S2
H2
PWH2
S3
H3
S4
H4
S5
H5
H6
2. All timing values are valid within the operating supply voltage and ambient temperature ranges and referenced to V
3. Cb is the capacitive load for each bus line.
4. For bus line loads Cb between 100 and 400pF the timing parameters must be linearly interpolated
5. C
6. Trise and Tfall (30%-70%) -10ns
7. I
an input voltage swing of V
F
2
VLCD
C bus AC Characteristics are tested by correlation
frame
Clock Frequency
Clock Cycle SCLK
SCLK pulse width HIGH
SCLK Pulse width LOW
CS setup time
CS hold time
CS minimum high time
SD/C setup time
SD/C hold time
SDIN setup time
SDIN hold time
SDOUT Access Time
SDOUT Disable Time vs. SCLK
SDOUT Disable Time vs. CS
is the filtering CApacitor on VLCD
=
f
--------- -
960
osc
SOUT
SCLK
SDIN
D/C
CS
Parameter
SS
to V
DD
t
t
S5
S2
t
t
S3
PWL1
t
S4
V
V
t
H5
DD1
DD1
t
WH1
t
H3
t
H4
= 1.7V;
= 1.7V
Test Condition
t
H2
t
CYC
t
H6
t
S2
t
PWH2
8
125
60
60
40
50
50
30
30
30
40
0
0
Min.
LR0096
Typ.
30
20
20
Max.
IL
and V
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
IH
with