PS240128WRF Powertip Technology, PS240128WRF Datasheet - Page 12

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PS240128WRF

Manufacturer Part Number
PS240128WRF
Description
Standard Value
Manufacturer
Powertip Technology
Datasheet
PE240128WRF-001-HQ
Pin No.
2.2 Interface Pin Description
10
12
11
1
2
3
4
5
6
7
8
9
RW_WR
Symbol
E_RD
RST
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
A0
Register select input pin
Read / Write execution control pin
They connect to the standard 8-bit MPU bus via the 8 bit bi-directional bus.When
the following interface is selected and the XCS pin is high, the following pins
become highimpedance, which should be fixed to VDD or VSS.
In IIC Interface
D7: SCL; D6: SI ; D0, D1: SA1, SA0
D3, D2: Acknowledgement
D4, D5, D8 should be fixed to VDD or VSS.
Read / Write execution control pin
Reset input pin. When RST is “L”, initialization is executed.
VER.0
MPU Type
6800
8080
MPU Type
6800
8080
A0 = "H": DB0 to DB8 or SI are display data
A0 = "L": DB0 to DB8 or SI are control data
RW_WR
RW
/WR
RW_WR
E
/RD
Page12
Description
Read / Write control input pin
RW = “H” : read
RW = “L” : write
Write enable clock input pin
The data on DB0 to DB8 are latched at the
rising edge of the /WR signal.
Description
Read / Write control input pin
-RW = “H”: When E is “H”, DB0 to DB8 are
in an output status.
-RW = “L”: The data on DB0 to DB8 are
latched at the falling edge of the E signal.
Read enable clock input pin
When /RD is “L”, DB0 to DB8 are in an
output status.
Function

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