S1D15715 Epson Electronics America, Inc., S1D15715 Datasheet - Page 24

• Manufacturer Part Number: S1D15715
• Description: Liquid Crystal Display =lcd Driver
• Manufacturer: Epson Electronics America, Inc.

S1D15715 Series Technical Manual
6.2.4 Line address circuit
The line address specifies the line address (as shown in Fig.4) relating to the COM output when the contents of
the DDRAM are displayed.
Using the Display start line address set command, the top line is normally selected (In case of the forward
common output state, the S1D15715 will designate the COM0 output, in case of the reverse common output
state, the S1D15715 will designate the COM15 output, the S1D15716 will designate the COM7 output and the
S1D15717 will designate the COM31 output.)
The display area of each driver is secured starting from the specified display start line address in the address
incrementing direction as follows: For S1D15715 (1/17Duty), 16 lines and a line of page 4 (total of 17 lines);
for S1D15716 (1/9Duty), 8 lines and a line of page 4 (total of 9 lines); for S1D15717 (1/33Duty), 32 lines and a
line of page 4 (total of 33 lines).
And Common driver direction select command can be used to reverse the relationship between the DDRAM
line address and common output.
For example, as is shown in Table 5, the display start line address corresponds to the COM0 output when the
common driver direction is normal, or the COM15 output when common driver direction is reversed
(S1D15715).
This allows flexible IC layout during LCD module assembly.
If the display start line address is changed dynamically using the display start line address set command, then
screen scrolling and page swapping can be performed.
6.2.5 Display data latch circuit
The display data latch circuit is a latch which temporarily stores the display data that is output to the LCD driver
circuit from the DDRAM.
Display ON/OFF command, Display normal/reverse command, and Display all points ON/OFF command
control only the data within the latch, and do not change the data within the DDRAM.
6.3 Oscillation circuit
S1D15715 Series generates display clocks using its built-in CR oscillation circuit.
The built-in oscillation circuit is enabled when CL=HIGH is selected and the power save mode is turned off.
You can stop operation of the CR oscillation circuit by selecting CL=LOW. Display clock can be externally
entered via CL pin (when external clock is turned off, CL pin must be placed in LOW).
Table 7 shows relationship between frequency of external clock (
(
Since CL pin is used for resetting the built-in CR oscillation circuit, it must satisfy the f
the “DC Characteristics”.
18
f
OSC
S1D15715
S1D15716
S1D15717
) and
1/17 Duty
1/33 Duty
Clock input
1/9 Duty
HIGH
Reverse Direction
LOW
Normal Direction
CL
Line Address
f
FR
Table 5 S1D15715 at display start line address=1CH (corresponds to Fig.4)
.
When built-in oscillation circuit is used
When built-in oscillation circuit is used
When built-in oscillation circuit is used
When external clock input is used
When external clock input is used
When external clock input is used
Item
COM15 COM14
COM0
Built-in CR oscillation circuit is turned off [display clock is turned off].
1CH
COM1
1DH
Built-in CR oscillation circuit is enabled.
Table 6
Table 7
EPSON
External clock input mode
COM12
Operation
COM3
1FH
f
CL
), frequency of built-in oscillation circuit
COM11
COM4
00H
f
FR
f
computation formula
FR
f
f
f
f
FR
FR
FR
FR
f
FR
=f
=f
=f
=f
=f
=f
OSC
OSC
OSC
CL
CL
CL
/ (17 × 16)
CL
/ (33 × 16)
/ (9 × 16)
/ (17 × 16)
/ (9 × 32)
/ (33 × 8)
COM14 COM15
COM1
requirements given in
0AH
COM0
0BH
Rev.1.0