S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 474
S1D13705
Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13705.pdf
(480 pages)
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4 VR4181A to S1D13705 Interface
4.1 Hardware Description
S1D13705
X27A-G-013-02
NEC VR4181A
Note:
When connecting the S1D13705 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13705 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
#MEMCS16
#MEMWR
#MEMRD
#LCDCS
D[15:0]
A[16:0]
IORDY
#UBE
Figure 4-1: Typical Implementation of VR4181A to S1D13705 Interface
The NEC VR4181A microprocessor is specifically designed to support an external LCD
controller by providing the internal address decoding and control signals necessary. By
using the Generic # 2 interface, a glueless interface is achieved. The diagram below shows
a typical implementation of the VR4181A to S1D13705 interface.
Oscillator
Pull-up
System RESET
Interfacing to the NEC VR4181A™ Microprocessor
Vcc
Vcc
Epson Research and Development
RD#
WE1#
RD/WR#
CS#
WAIT#
RESET#
AB[15:0]
DB[15:0]
BCLK
BS#
WE0#
S1D13705
Vancouver Design Center
Issue Date: 01/02/13
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