CY39100V Cypress Semiconductor Corporation., CY39100V Datasheet - Page 21

• Manufacturer Part Number: CY39100V
• Description: Cplds At Fpga Densities
• Manufacturer: Cypress Semiconductor Corporation.

Channel Memory Timing Parameter Descriptions
Switching Characteristics—Parameter Values
Document #: 38-03039 Rev. *I
t
t
t
t
t
t
Synchronous Clocking Parameters
t
t
t
t
t
t
t
t
t
t
t
t
f
f
t
t
t
t
t
t
Miscellaneous Parameters
t
t
PLL Parameters
t
t
t
t
t
PD
EA
ER
PRR
PRO
PRW
MCS
MCH
MCCO
IOS
IOH
IOCO
SCS
SCS2
ICS
OCS
CHZ
CLZ
MAX
MAX2
MCSPT
MCHPT
MCCOPT
SCS2PT
CHSW
CL2CL
CPLD
MCCD
MCCJ
DWSA
DWOSA
LOCK
CHMCHAA
Combinatorial Mode Parameters
Product Term Clocking Parameters
Channel Interconnect Parameters
Internal Parameters
Parameter
Parameter
–1.35
–150
–150
Asynchronous channel memory access time from input of channel memory to output of channel memory
Min.
6.0
9.5
3.3
2.7
1.0
0.9
3.4
4.3
4.5
4.5
1.5
2.7
0.9
6.0
0
233
–0.85
Max.
0.22
294
233
150
150
250
7.2
4.5
4.5
5.8
3.8
3.5
7.5
0.9
1.8
2.8
–1.35
–150
–150
Min.
6.0
3.6
3.0
1.0
1.0
3.5
4.5
5.0
5.0
1.5
3.0
1.0
6.5
10
0
200
–0.85
Max.
0.25
286
222
150
150
250
7.5
5.0
5.0
6.0
4.0
3.5
8.0
1.0
2.0
3.0
–1.35
–150
–150
Over the Operating Range
Min.
10.5
6.0
4.0
3.5
1.2
1.2
3.6
5.5
5.5
5.5
1.5
3.3
1.4
7.2
0
Over the Operating Range (continued)
181
Description
–0.85
Max.
0.28
278
181
150
150
250
8.5
5.6
5.3
7.0
4.5
3.8
8.8
1.2
2.3
3.3
–180
–180
Min.
10.0
–2.0
8.0
6.0
5.0
2.0
2.0
6.4
8.0
8.0
8.0
1.5
5.0
2.0
13
0
125
Max.
11.0
0.35
–1.5
156
125
180
180
250
9.0
9.0
7.0
6.0
1.7
2.8
4.0
10
10
Delta39K™ ISR™
–200
–200
Min.
15.0
–2.9
7.0
6.7
2.5
2.5
9.6
1.5
6.0
2.5
10
15
12
12
12
0
CPLD Family
83
Max.
15.0
0.38
–2.4
104
200
200
250
8.0
7.0
2.0
3.0
5.0
15
10
10
12
83
Page 21 of 86
MHz
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
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