WM8608 ETC-unknow, WM8608 Datasheet - Page 25

• Manufacturer Part Number: WM8608
• Description: The Wm8608 Comprises A High Performance Multi-channel Pwm Digital Power Amplifier Controller. Simply By Adding Appropriate Power Output Stages A Multi-channel Power Amplifier May Be Built. Six Identical Full Audio Bandwidth Channels, Plus A Reduced B
• Manufacturer: ETC-unknow

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CONTROL INTERFACE OPERATION
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Table 18 Synchroniser Setup and Locking
Note: The Synchroniser requires a continuously running LRCLK. If that is not the case the HOLD
signal has to be applied to avoid the synchronizer drifting.
SELECTION OF CONTROL MODE
The WM8608 is controlled by writing to registers through a serial control interface. A control word
consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select which control register is
accessed. The remaining 9 bits (B8 to B0) are register bits, corresponding to the 9 bits in each
control register. The control interface can operate as either a 3-wire or 2-wire MPU interface. The
MODE pin selects the interface format. An internal pull-down resistor configures the Control Interface
to a default 2 wire format.
Table 19 Control Interface Mode Selection
The WM8606 Control Interface operates as a slave device only.
3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE
The WM8608 is controlled using a 3-wire serial interface. SDIN is used for the program data, SCLK
is used to clock in the program data and CSB is use to latch in the program data. The 3-wire
interface protocol is shown in Figure 13.
Figure 18 3-wire Serial Interface
The bits B[15:9] are Control Address Bits and the bits B[8:0] are Control Data Bits
2-WIRE SERIAL CONTROL MODE
The WM8608 supports software control via a 2-wire serial bus. Many devices can be controlled by
the same bus, and each device has a unique 7-bit address (this is not the same as the 7-bit address
of each register in the WM8608).
The controller indicates the start of data transfer with a high to low transition on SDIN while SCLK
remains high. This indicates that a device address and data will follow. All devices on the 2-wire bus
respond to the start condition and shift in the next eight bits on SDIN (7-bit address + Read/Write bit,
MSB first). If the device address received matches the address of the WM8608 and the R/W bit is ‘0’,
indicating a write, then the WM8608 responds by pulling SDIN low on the next clock pulse (ACK). If
the address is not recognised or the R/W bit is ‘1’, the WM8608 returns to the idle condition and wait
for a new start condition and valid address.
SCLK
SDIN
CSB
F
±10’000
OFFLRCLK
[ppm]
±1000
MODE
±100
High
Low
B15
B14
B13
INTERFACE FORMAT
B12
max
2
2
2
10
10
8
2 wire (default)
B11
3 wire
G
B10
B9
min
2
2
2
0
0
0
B8
B7
B6
GAIN TIME-OUT
B5
[ms]
~20
~1
~4
B4
B3
PP Rev 1.5 March 2004
B2
B1
WM8608
B0
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